Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007 Michal Simek |
| 4 | * |
| 5 | * Michal SIMEK <monstr@monstr.eu> |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 9 | #include <fdtdec.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Simon Glass | 495a5dc | 2019-11-14 12:57:30 -0700 | [diff] [blame] | 12 | #include <time.h> |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 13 | #include <asm/microblaze_timer.h> |
Michal Simek | 77a1e24 | 2007-05-07 17:22:25 +0200 | [diff] [blame] | 14 | #include <asm/microblaze_intc.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 15 | #include <linux/delay.h> |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 16 | |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 19 | volatile int timestamp = 0; |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 20 | microblaze_timer_t *tmr; |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 21 | |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 22 | ulong get_timer (ulong base) |
| 23 | { |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 24 | if (tmr) |
| 25 | return timestamp - base; |
| 26 | return timestamp++ - base; |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 27 | } |
| 28 | |
Michal Simek | 64f9640 | 2012-06-29 13:42:28 +0200 | [diff] [blame] | 29 | void __udelay(unsigned long usec) |
| 30 | { |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 31 | u32 i; |
Michal Simek | 64f9640 | 2012-06-29 13:42:28 +0200 | [diff] [blame] | 32 | |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 33 | if (tmr) { |
| 34 | i = get_timer(0); |
| 35 | while ((get_timer(0) - i) < (usec / 1000)) |
| 36 | ; |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 37 | } |
Michal Simek | 64f9640 | 2012-06-29 13:42:28 +0200 | [diff] [blame] | 38 | } |
Michal Simek | 64f9640 | 2012-06-29 13:42:28 +0200 | [diff] [blame] | 39 | |
Michal Simek | 26acb3e | 2014-01-21 07:30:37 +0100 | [diff] [blame] | 40 | #ifndef CONFIG_SPL_BUILD |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 41 | static void timer_isr(void *arg) |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 42 | { |
| 43 | timestamp++; |
| 44 | tmr->control = tmr->control | TIMER_INTERRUPT; |
| 45 | } |
| 46 | |
Michal Simek | d1ff6c7 | 2010-04-16 11:37:41 +0200 | [diff] [blame] | 47 | int timer_init (void) |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 48 | { |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 49 | int irq = -1; |
| 50 | u32 preload = 0; |
| 51 | u32 ret = 0; |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 52 | const void *blob = gd->fdt_blob; |
| 53 | int node = 0; |
| 54 | u32 cell[2]; |
| 55 | |
| 56 | debug("TIMER: Initialization\n"); |
| 57 | |
Michal Simek | f54fbc8 | 2018-07-11 14:08:26 +0200 | [diff] [blame] | 58 | /* Do not init before relocation */ |
| 59 | if (!(gd->flags & GD_FLG_RELOC)) |
| 60 | return 0; |
| 61 | |
Michal Simek | cf84885 | 2016-02-15 12:10:32 +0100 | [diff] [blame] | 62 | node = fdt_node_offset_by_compatible(blob, node, |
| 63 | "xlnx,xps-timer-1.00.a"); |
| 64 | if (node != -1) { |
| 65 | fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); |
| 66 | if (base == FDT_ADDR_T_NONE) |
| 67 | return -1; |
| 68 | |
| 69 | debug("TIMER: Base addr %lx\n", base); |
| 70 | tmr = (microblaze_timer_t *)base; |
| 71 | |
| 72 | ret = fdtdec_get_int_array(blob, node, "interrupts", |
| 73 | cell, ARRAY_SIZE(cell)); |
| 74 | if (ret) |
| 75 | return ret; |
| 76 | |
| 77 | irq = cell[0]; |
| 78 | debug("TIMER: IRQ %x\n", irq); |
| 79 | |
| 80 | preload = fdtdec_get_int(blob, node, "clock-frequency", 0); |
| 81 | preload /= CONFIG_SYS_HZ; |
| 82 | } else { |
| 83 | return node; |
| 84 | } |
| 85 | |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 86 | if (tmr && preload && irq >= 0) { |
| 87 | tmr->loadreg = preload; |
| 88 | tmr->control = TIMER_INTERRUPT | TIMER_RESET; |
| 89 | tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ |
| 90 | TIMER_RELOAD | TIMER_DOWN_COUNT; |
| 91 | timestamp = 0; |
| 92 | ret = install_interrupt_handler (irq, timer_isr, (void *)tmr); |
| 93 | if (ret) |
| 94 | tmr = NULL; |
| 95 | } |
Michal Simek | 06ac651 | 2012-06-29 13:46:54 +0200 | [diff] [blame] | 96 | /* No problem if timer is not found/initialized */ |
Michal Simek | d1ff6c7 | 2010-04-16 11:37:41 +0200 | [diff] [blame] | 97 | return 0; |
Michal Simek | 952d514 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 98 | } |
Michal Simek | 26acb3e | 2014-01-21 07:30:37 +0100 | [diff] [blame] | 99 | #else |
| 100 | int timer_init(void) |
| 101 | { |
| 102 | return 0; |
| 103 | } |
| 104 | #endif |
Stephan Linz | cba5bf0 | 2012-02-22 22:39:57 +0100 | [diff] [blame] | 105 | |
| 106 | /* |
| 107 | * This function is derived from PowerPC code (read timebase as long long). |
| 108 | * On Microblaze it just returns the timer value. |
| 109 | */ |
| 110 | unsigned long long get_ticks(void) |
| 111 | { |
| 112 | return get_timer(0); |
| 113 | } |
| 114 | |
| 115 | /* |
| 116 | * This function is derived from PowerPC code (timebase clock frequency). |
| 117 | * On Microblaze it returns the number of timer ticks per second. |
| 118 | */ |
| 119 | ulong get_tbclk(void) |
| 120 | { |
| 121 | return CONFIG_SYS_HZ; |
| 122 | } |