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Michael Schwingen06a9e122008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-4 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#define CONFIG_IXP425 1
30#define CONFIG_ACTUX4 1
31
Marek Vasutf0ed2fb2012-03-06 00:45:35 +010032#define CONFIG_MACH_TYPE 1532
33
Michael Schwingen06a9e122008-01-16 19:53:23 +010034#define CONFIG_DISPLAY_CPUINFO 1
35#define CONFIG_DISPLAY_BOARDINFO 1
36
Jean-Christophe PLAGNIOL-VILLARD08cae4d2009-01-31 09:10:48 +010037#define CONFIG_IXP_SERIAL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1
Michael Schwingen06a9e122008-01-16 19:53:23 +010039#define CONFIG_BAUDRATE 115200
40#define CONFIG_BOOTDELAY 3
41#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020042#define CONFIG_BOARD_EARLY_INIT_F 1
Michael Schwingen06a9e122008-01-16 19:53:23 +010043
44/***************************************************************
45 * U-boot generic defines start here.
46 ***************************************************************/
Michael Schwingen06a9e122008-01-16 19:53:23 +010047/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020048#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingen06a9e122008-01-16 19:53:23 +010049
50/* allow to overwrite serial and ethaddr */
51#define CONFIG_ENV_OVERWRITE
52
53/* Command line configuration */
54#include <config_cmd_default.h>
55
56#define CONFIG_CMD_ELF
57
Michael Schwingen67ea3d92011-05-23 00:00:07 +020058#define CONFIG_PCI
59#ifdef CONFIG_PCI
60#define CONFIG_CMD_PCI
61#define CONFIG_PCI_PNP
62#define CONFIG_IXP_PCI
63#define CONFIG_PCI_SCAN_SHOW
64#define CONFIG_CMD_PCI_ENUM
65#endif
66
Michael Schwingen06a9e122008-01-16 19:53:23 +010067#define CONFIG_BOOTCOMMAND "run boot_flash"
68/* enable passing of ATAGs */
69#define CONFIG_CMDLINE_TAG 1
70#define CONFIG_SETUP_MEMORY_TAGS 1
71#define CONFIG_INITRD_TAG 1
72
73#if defined(CONFIG_CMD_KGDB)
74# define CONFIG_KGDB_BAUDRATE 230400
75/* which serial port to use */
76# define CONFIG_KGDB_SER_INDEX 1
77#endif
78
79/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020080#define CONFIG_SYS_LONGHELP
81#define CONFIG_SYS_PROMPT "=> "
Michael Schwingen06a9e122008-01-16 19:53:23 +010082/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083#define CONFIG_SYS_CBSIZE 256
Michael Schwingen06a9e122008-01-16 19:53:23 +010084/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020085#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingen06a9e122008-01-16 19:53:23 +010086/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#define CONFIG_SYS_MAXARGS 16
Michael Schwingen06a9e122008-01-16 19:53:23 +010088/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingen06a9e122008-01-16 19:53:23 +010090
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#define CONFIG_SYS_MEMTEST_START 0x00400000
92#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingen06a9e122008-01-16 19:53:23 +010093
Michael Schwingen67ea3d92011-05-23 00:00:07 +020094/* timer clock - 2* OSC_IN system clock */
95#define CONFIG_IXP425_TIMER_CLK 66000000
96#define CONFIG_SYS_HZ 1000
Michael Schwingen06a9e122008-01-16 19:53:23 +010097
98/* default load address */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020099#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100100
101/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100103 115200, 230400 }
104#define CONFIG_SERIAL_RTS_ACTIVE 1
105
106/*
107 * Stack sizes
108 * The stack sizes are set up in start.S using the settings below
109 */
110#define CONFIG_STACKSIZE (128*1024) /* regular stack */
Michael Schwingen06a9e122008-01-16 19:53:23 +0100111
112/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200113#define CONFIG_SYS_EXP_CS0 0xbd113003
Michael Schwingen06a9e122008-01-16 19:53:23 +0100114
115/* SDRAM settings */
116#define CONFIG_NR_DRAM_BANKS 1
117#define PHYS_SDRAM_1 0x00000000
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200118#define CONFIG_SYS_SDRAM_BASE 0x00000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100119
120/* 32MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200121#define CONFIG_SYS_SDR_CONFIG 0x18
Michael Schwingen06a9e122008-01-16 19:53:23 +0100122#define PHYS_SDRAM_1_SIZE 0x02000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
124#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
125#define CONFIG_SYS_DRAM_SIZE 0x02000000
Michael Schwingen06a9e122008-01-16 19:53:23 +0100126
127/* FLASH organization */
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200128#define CONFIG_SYS_TEXT_BASE 0x50000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#define CONFIG_SYS_MAX_FLASH_BANKS 2
Michael Schwingen06a9e122008-01-16 19:53:23 +0100130/* max # of sectors per chip */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131#define CONFIG_SYS_MAX_FLASH_SECT 70
Michael Schwingen06a9e122008-01-16 19:53:23 +0100132#define PHYS_FLASH_1 0x50000000
133#define PHYS_FLASH_2 0x51000000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
Michael Schwingen06a9e122008-01-16 19:53:23 +0100135
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
137#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
138#define CONFIG_SYS_MONITOR_LEN (252 << 10)
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200139#define CONFIG_BOARD_SIZE_LIMIT 258048
Michael Schwingen06a9e122008-01-16 19:53:23 +0100140
141/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200143#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingen06a9e122008-01-16 19:53:23 +0100144/* board provides its own flash_init code */
145#define CONFIG_FLASH_CFI_LEGACY 1
146/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200147#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingen06a9e122008-01-16 19:53:23 +0100148/* SST 39VF020 etc. support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100150
151/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingen06a9e122008-01-16 19:53:23 +0100153
154/* Ethernet */
155
156/* include IXP4xx NPE support */
157#define CONFIG_IXP4XX_NPE 1
Michael Schwingen06a9e122008-01-16 19:53:23 +0100158
Michael Schwingen06a9e122008-01-16 19:53:23 +0100159/* NPE0 PHY address */
160#define CONFIG_PHY_ADDR 0x1C
161/* MII PHY management */
162#define CONFIG_MII 1
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200163
Michael Schwingen06a9e122008-01-16 19:53:23 +0100164/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingen06a9e122008-01-16 19:53:23 +0100166
167#define CONFIG_CMD_DHCP
168#define CONFIG_CMD_NET
169#define CONFIG_CMD_MII
170#define CONFIG_CMD_PING
171#undef CONFIG_CMD_NFS
172
173/* BOOTP options */
174#define CONFIG_BOOTP_BOOTFILESIZE
175#define CONFIG_BOOTP_BOOTPATH
176#define CONFIG_BOOTP_GATEWAY
177#define CONFIG_BOOTP_HOSTNAME
178
179/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200180#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingen06a9e122008-01-16 19:53:23 +0100181
182/* environment organization: one complete 4k flash sector */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200183#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200184#define CONFIG_ENV_SIZE 0x1000
185#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100186
187#define CONFIG_EXTRA_ENV_SETTINGS \
Jean-Christophe PLAGNIOL-VILLARD1948d6c2009-01-31 09:53:39 +0100188 "npe_ucode=51000000\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100189 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \
190 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \
191 "kerneladdr=51020000\0" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200192 "kernelfile=actux4/uImage\0" \
193 "rootfile=actux4/rootfs\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100194 "rootaddr=51160000\0" \
195 "loadaddr=10000\0" \
196 "updateboot_ser=mw.b 10000 ff 40000;" \
197 " loady ${loadaddr};" \
198 " run eraseboot writeboot\0" \
199 "updateboot_net=mw.b 10000 ff 40000;" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200200 " tftp ${loadaddr} actux4/u-boot.bin;" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100201 " run eraseboot writeboot\0" \
202 "eraseboot=protect off 50000000 5003efff;" \
203 " erase 50000000 +${filesize}\0" \
204 "writeboot=cp.b 10000 50000000 ${filesize}\0" \
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200205 "updateucode=loady;" \
206 " era ${npe_ucode} +${filesize};" \
207 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
Michael Schwingen06a9e122008-01-16 19:53:23 +0100208 "updateroot=tftp ${loadaddr} ${rootfile};" \
209 " era ${rootaddr} +${filesize};" \
210 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
211 "updatekern=tftp ${loadaddr} ${kernelfile};" \
212 " era ${kerneladdr} +${filesize};" \
213 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
214 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
215 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
216 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
217 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
218 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
219 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
220 "boot_flash=run flashargs addtty addeth;" \
221 " bootm ${kerneladdr}\0" \
222 "boot_net=run netargs addtty addeth;" \
223 " tftpboot ${loadaddr} ${kernelfile};" \
224 " bootm\0"
225
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200226/* additions for new relocation code, must be added to all boards */
227#define CONFIG_SYS_INIT_SP_ADDR \
228 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
229
Michael Schwingen06a9e122008-01-16 19:53:23 +0100230#endif /* __CONFIG_H */