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git01.mediatek.com / filogic / uboot / 53658979bb321b5aef2c67e66ecbc3b2274d87ec / . / arch / arm / mach-k3 / include / mach / k3-qos.h
blob: eb0f2a0448ad07d93a58490bfc2a36aa6cb72edd [file] [log] [blame]
Aradhya Bhatia5b095382024-02-12 15:36:35 +0530[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Quality of Service (QoS) Configuration Header File
4 *
5 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
6 */
7#ifndef _K3_QOS_H_
8#define _K3_QOS_H_
9
10#include <linux/kernel.h>
11
Jayesh Choudhary53658972024-06-14 18:14:36 +0530[diff] [blame^]12/* K3_QOS_REG: Registers to configure the channel for a given endpoint */
Jayesh Choudhary61a70b92024-06-14 18:14:35 +0530[diff] [blame]13
Jayesh Choudhary53658972024-06-14 18:14:36 +0530[diff] [blame^]14#define K3_QOS_REG(base_reg, i) (base_reg + 0x100 + (i) * 4)
Jayesh Choudhary61a70b92024-06-14 18:14:35 +0530[diff] [blame]15
Jayesh Choudhary53658972024-06-14 18:14:36 +0530[diff] [blame^]16#define K3_QOS_VAL(qos, orderid, asel, epriority, virtid, atype) \
17 (qos << 0 | \
18 orderid << 4 | \
19 asel << 8 | \
20 epriority << 12 | \
21 virtid << 16 | \
22 atype << 28)
Jayesh Choudhary61a70b92024-06-14 18:14:35 +0530[diff] [blame]23
Jayesh Choudhary53658972024-06-14 18:14:36 +0530[diff] [blame^]24/*
25 * K3_QOS_GROUP_REG: Registers to set 1:1 mapping for orderID MAP1/MAP2
26 * remap registers.
27 */
28#define K3_QOS_GROUP_REG(base_reg, i) (base_reg + (i) * 4)
Jayesh Choudhary61a70b92024-06-14 18:14:35 +0530[diff] [blame]29
Jayesh Choudhary53658972024-06-14 18:14:36 +0530[diff] [blame^]30#define K3_QOS_GROUP_DEFAULT_VAL_LOW 0x76543210
31#define K3_QOS_GROUP_DEFAULT_VAL_HIGH 0xfedcba98
Aradhya Bhatia5b095382024-02-12 15:36:35 +0530[diff] [blame]32struct k3_qos_data {
33 u32 reg;
34 u32 val;
35};
36
37#if (IS_ENABLED(CONFIG_K3_QOS))
38extern struct k3_qos_data qos_data[];
39extern u32 qos_count;
40#endif
41
42#endif /* _K3_QOS_H_ */