| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 Microsemi Corporation |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | #address-cells = <1>; |
| 8 | #size-cells = <1>; |
| 9 | compatible = "mscc,serval"; |
| 10 | |
| 11 | cpus { |
| 12 | #address-cells = <1>; |
| 13 | #size-cells = <0>; |
| 14 | |
| 15 | cpu@0 { |
| 16 | compatible = "mips,mips24KEc"; |
| 17 | device_type = "cpu"; |
| 18 | clocks = <&cpu_clk>; |
| 19 | reg = <0>; |
| 20 | }; |
| 21 | }; |
| 22 | |
| 23 | aliases { |
| 24 | serial0 = &uart0; |
| 25 | gpio0 = &gpio; |
| 26 | }; |
| 27 | |
| 28 | cpuintc: interrupt-controller { |
| 29 | #address-cells = <0>; |
| 30 | #interrupt-cells = <1>; |
| 31 | interrupt-controller; |
| 32 | compatible = "mti,cpu-interrupt-controller"; |
| 33 | }; |
| 34 | |
| 35 | cpu_clk: cpu-clock { |
| 36 | compatible = "fixed-clock"; |
| 37 | #clock-cells = <0>; |
| 38 | clock-frequency = <416666666>; |
| 39 | }; |
| 40 | |
| 41 | ahb_clk: ahb-clk { |
| 42 | compatible = "fixed-factor-clock"; |
| 43 | #clock-cells = <0>; |
| 44 | clocks = <&cpu_clk>; |
| 45 | clock-div = <2>; |
| 46 | clock-mult = <1>; |
| 47 | }; |
| 48 | |
| 49 | ahb: ahb { |
| 50 | compatible = "simple-bus"; |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <1>; |
| 53 | ranges; |
| 54 | |
| 55 | interrupt-parent = <&intc>; |
| 56 | |
| 57 | cpu_ctrl: syscon@70000000 { |
| 58 | compatible = "mscc,ocelot-cpu-syscon", "syscon"; |
| 59 | reg = <0x70000000 0x2c>; |
| 60 | }; |
| 61 | |
| 62 | intc: interrupt-controller@70000070 { |
| 63 | compatible = "mscc,serval-icpu-intr"; |
| 64 | reg = <0x70000070 0x70>; |
| 65 | #interrupt-cells = <1>; |
| 66 | interrupt-controller; |
| 67 | interrupt-parent = <&cpuintc>; |
| 68 | interrupts = <2>; |
| 69 | }; |
| 70 | |
| 71 | uart0: serial@70100000 { |
| 72 | pinctrl-0 = <&uart_pins>; |
| 73 | pinctrl-names = "default"; |
| 74 | compatible = "ns16550a"; |
| 75 | reg = <0x70100000 0x20>; |
| 76 | interrupts = <6>; |
| 77 | clocks = <&ahb_clk>; |
| 78 | reg-io-width = <4>; |
| 79 | reg-shift = <2>; |
| 80 | |
| 81 | status = "disabled"; |
| 82 | }; |
| 83 | |
| 84 | uart2: serial@70100800 { |
| 85 | pinctrl-0 = <&uart2_pins>; |
| 86 | pinctrl-names = "default"; |
| 87 | compatible = "ns16550a"; |
| 88 | reg = <0x70100800 0x20>; |
| 89 | interrupts = <7>; |
| 90 | clocks = <&ahb_clk>; |
| 91 | reg-io-width = <4>; |
| 92 | reg-shift = <2>; |
| 93 | |
| 94 | status = "disabled"; |
| 95 | }; |
| 96 | |
| 97 | gpio: pinctrl@71070034 { |
| 98 | compatible = "mscc,serval-pinctrl"; |
| 99 | reg = <0x71070034 0x28>; |
| 100 | gpio-controller; |
| 101 | #gpio-cells = <2>; |
| 102 | gpio-ranges = <&gpio 0 0 22>; |
| 103 | |
| 104 | sgpio_pins: sgpio-pins { |
| 105 | pins = "GPIO_0", "GPIO_2", "GPIO_3", "GPIO_1"; |
| 106 | function = "sg0"; |
| 107 | }; |
| 108 | |
| 109 | i2c_pins: i2c-pins { |
| 110 | pins = "GPIO_6", "GPIO_7"; |
| 111 | function = "twi"; |
| 112 | }; |
| 113 | |
| 114 | uart_pins: uart-pins { |
| 115 | pins = "GPIO_26", "GPIO_27"; |
| 116 | function = "uart"; |
| 117 | }; |
| 118 | |
| 119 | uart2_pins: uart2-pins { |
| 120 | pins = "GPIO_13", "GPIO_14"; |
| 121 | function = "uart2"; |
| 122 | }; |
| 123 | |
| 124 | cs1_pins: cs1-pins { |
| 125 | pins = "GPIO_8"; |
| 126 | function = "si"; |
| 127 | }; |
| 128 | |
| 129 | irqext0_pins: irqext0-pins { |
| 130 | pins = "GPIO_28"; |
| 131 | function = "irq0"; |
| 132 | }; |
| 133 | |
| 134 | irqext1_pins: irqext1-pins { |
| 135 | pins = "GPIO_29"; |
| 136 | function = "irq1"; |
| 137 | }; |
| 138 | }; |
| 139 | |
| 140 | i2c0: i2c@70100400 { |
| 141 | compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; |
| 142 | status = "disabled"; |
| 143 | pinctrl-0 = <&i2c_pins>; |
| 144 | pinctrl-names = "default"; |
| 145 | reg = <0x70100400 0x100>, <0x70000190 0x8>; |
| 146 | #address-cells = <1>; |
| 147 | #size-cells = <0>; |
| 148 | interrupts = <8>; |
| 149 | clock-frequency = <100000>; |
| 150 | clocks = <&ahb_clk>; |
| 151 | }; |
| 152 | }; |
| 153 | }; |