blob: 2a2821f4c580b0afe219394e0de64072e924482f [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/linux-event-codes.h>
7#include <dt-bindings/pinctrl/rockchip.h>
8#include "rk3566-anbernic-rgxx3.dtsi"
9
10/ {
11 backlight: backlight {
12 compatible = "pwm-backlight";
13 power-supply = <&vcc_sys>;
14 pwms = <&pwm4 0 25000 0>;
15 };
16};
17
18&cru {
19 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
20 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
21 assigned-clock-rates = <32768>, <1200000000>,
22 <200000000>, <241500000>;
23};
24
25&dsi_dphy0 {
26 status = "okay";
27};
28
29&dsi0 {
30 status = "okay";
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 ports {
35 dsi0_in: port@0 {
36 reg = <0>;
37 dsi0_in_vp1: endpoint {
38 remote-endpoint = <&vp1_out_dsi0>;
39 };
40 };
41
42 dsi0_out: port@1 {
43 reg = <1>;
44 mipi_out_panel: endpoint {
45 remote-endpoint = <&mipi_in_panel>;
46 };
47 };
48 };
49
50 panel: panel@0 {
51 compatible = "anbernic,rg353p-panel", "newvision,nv3051d";
52 reg = <0>;
53 backlight = <&backlight>;
54 pinctrl-names = "default";
55 pinctrl-0 = <&lcd_rst>;
56 reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
57 vdd-supply = <&vcc3v3_lcd0_n>;
58
59 port {
60 mipi_in_panel: endpoint {
61 remote-endpoint = <&mipi_out_panel>;
62 };
63 };
64 };
65};
66
67&gpio_keys_control {
68 button-a {
69 gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
70 label = "EAST";
71 linux,code = <BTN_EAST>;
72 };
73
74 button-left {
75 gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
76 label = "DPAD-LEFT";
77 linux,code = <BTN_DPAD_LEFT>;
78 };
79
80 button-right {
81 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
82 label = "DPAD-RIGHT";
83 linux,code = <BTN_DPAD_RIGHT>;
84 };
85
86 button-y {
87 gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
88 label = "WEST";
89 linux,code = <BTN_WEST>;
90 };
91};
92
93&i2c0 {
94 /* This hardware is physically present but unused. */
95 power-monitor@62 {
96 compatible = "cellwise,cw2015";
97 reg = <0x62>;
98 status = "disabled";
99 };
100};
101
102&pinctrl {
103 gpio-lcd {
104 lcd_rst: lcd-rst {
105 rockchip,pins =
106 <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
107 };
108 };
109};
110
111&pwm4 {
112 status = "okay";
113};
114
115&vp1 {
116 vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
117 reg = <ROCKCHIP_VOP2_EP_MIPI0>;
118 remote-endpoint = <&dsi0_in_vp1>;
119 };
120};