Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: BSD-3-Clause |
| 2 | /* |
| 3 | * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> |
| 4 | */ |
| 5 | |
| 6 | #include "msm8996.dtsi" |
| 7 | |
| 8 | / { |
| 9 | qcom,msm-id = <246 0x30000>; |
| 10 | }; |
| 11 | |
| 12 | /* |
| 13 | * This revision seems to have differ GPU CPR |
| 14 | * parameters, GPU frequencies and some differences |
| 15 | * when it comes to voltage delivery to.. once again |
| 16 | * the GPU. Funnily enough, it's simpler to make it an |
| 17 | * overlay on top of 3.1 (the final one) than vice versa. |
| 18 | * The differences will show here as more and more |
| 19 | * features get enabled upstream. |
| 20 | */ |
| 21 | |
| 22 | gpu_opp_table_3_0: opp-table-gpu30 { |
| 23 | compatible = "operating-points-v2"; |
| 24 | |
| 25 | opp-624000000 { |
| 26 | opp-hz = /bits/ 64 <624000000>; |
| 27 | opp-level = <7>; |
| 28 | }; |
| 29 | |
| 30 | opp-560000000 { |
| 31 | opp-hz = /bits/ 64 <560000000>; |
| 32 | opp-level = <6>; |
| 33 | }; |
| 34 | |
| 35 | opp-510000000 { |
| 36 | opp-hz = /bits/ 64 <510000000>; |
| 37 | opp-level = <5>; |
| 38 | }; |
| 39 | |
| 40 | opp-401800000 { |
| 41 | opp-hz = /bits/ 64 <401800000>; |
| 42 | opp-level = <4>; |
| 43 | }; |
| 44 | |
| 45 | opp-315000000 { |
| 46 | opp-hz = /bits/ 64 <315000000>; |
| 47 | opp-level = <3>; |
| 48 | }; |
| 49 | |
| 50 | opp-214000000 { |
| 51 | opp-hz = /bits/ 64 <214000000>; |
| 52 | opp-level = <3>; |
| 53 | }; |
| 54 | |
| 55 | opp-133000000 { |
| 56 | opp-hz = /bits/ 64 <133000000>; |
| 57 | opp-level = <3>; |
| 58 | }; |
| 59 | }; |
| 60 | |
| 61 | &gpu { |
| 62 | operating-points-v2 = <&gpu_opp_table_3_0>; |
| 63 | }; |