Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) 2013 Marek Belisko <marek@goldelico.com> |
| 4 | * |
| 5 | * Based on omap3-beagle-xm.dts |
| 6 | */ |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include "omap36xx.dtsi" |
| 10 | #include <dt-bindings/input/input.h> |
| 11 | |
| 12 | / { |
| 13 | model = "OMAP3 GTA04"; |
| 14 | compatible = "goldelico,gta04", "ti,omap3630", "ti,omap3"; |
| 15 | cpus { |
| 16 | cpu@0 { |
| 17 | cpu0-supply = <&vcc>; |
| 18 | }; |
| 19 | }; |
| 20 | |
| 21 | memory@80000000 { |
| 22 | device_type = "memory"; |
| 23 | reg = <0x80000000 0x20000000>; /* 512 MB */ |
| 24 | }; |
| 25 | |
| 26 | chosen { |
| 27 | stdout-path = &uart3; |
| 28 | }; |
| 29 | |
| 30 | aliases { |
| 31 | display0 = &lcd; |
| 32 | display1 = &tv0; |
| 33 | /delete-property/ mmc2; |
| 34 | /delete-property/ mmc3; |
| 35 | }; |
| 36 | |
| 37 | ldo_3v3: fixedregulator { |
| 38 | compatible = "regulator-fixed"; |
| 39 | regulator-name = "ldo_3v3"; |
| 40 | regulator-min-microvolt = <3300000>; |
| 41 | regulator-max-microvolt = <3300000>; |
| 42 | regulator-always-on; |
| 43 | }; |
| 44 | |
| 45 | /* fixed 26MHz oscillator */ |
| 46 | hfclk_26m: oscillator { |
| 47 | #clock-cells = <0>; |
| 48 | compatible = "fixed-clock"; |
| 49 | clock-frequency = <26000000>; |
| 50 | }; |
| 51 | |
| 52 | gpio-keys { |
| 53 | compatible = "gpio-keys"; |
| 54 | |
| 55 | aux-button { |
| 56 | label = "aux"; |
| 57 | linux,code = <KEY_PHONE>; |
| 58 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| 59 | wakeup-source; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | antenna-detect { |
| 64 | compatible = "gpio-keys"; |
| 65 | |
| 66 | gps_antenna_button: gps-antenna-button { |
| 67 | label = "GPS_EXT_ANT"; |
| 68 | linux,input-type = <EV_SW>; |
| 69 | linux,code = <SW_LINEIN_INSERT>; |
| 70 | gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */ |
| 71 | interrupt-parent = <&gpio5>; |
| 72 | interrupts = <16 IRQ_TYPE_EDGE_BOTH>; |
| 73 | debounce-interval = <10>; |
| 74 | wakeup-source; |
| 75 | }; |
| 76 | }; |
| 77 | |
| 78 | sound { |
| 79 | compatible = "ti,omap-twl4030"; |
| 80 | ti,model = "gta04"; |
| 81 | |
| 82 | ti,mcbsp = <&mcbsp2>; |
| 83 | }; |
| 84 | |
| 85 | /* GSM audio */ |
| 86 | sound_telephony { |
| 87 | compatible = "simple-audio-card"; |
| 88 | simple-audio-card,name = "GTA04 voice"; |
| 89 | simple-audio-card,bitclock-master = <&telephony_link_master>; |
| 90 | simple-audio-card,frame-master = <&telephony_link_master>; |
| 91 | simple-audio-card,format = "i2s"; |
| 92 | simple-audio-card,bitclock-inversion; |
| 93 | simple-audio-card,frame-inversion; |
| 94 | simple-audio-card,cpu { |
| 95 | sound-dai = <&mcbsp4>; |
| 96 | }; |
| 97 | |
| 98 | telephony_link_master: simple-audio-card,codec { |
| 99 | sound-dai = <>m601_codec>; |
| 100 | }; |
| 101 | }; |
| 102 | |
| 103 | gtm601_codec: gsm_codec { |
| 104 | compatible = "option,gtm601"; |
| 105 | #sound-dai-cells = <0>; |
| 106 | }; |
| 107 | |
| 108 | spi_lcd: spi { |
| 109 | compatible = "spi-gpio"; |
| 110 | #address-cells = <0x1>; |
| 111 | #size-cells = <0x0>; |
| 112 | pinctrl-names = "default"; |
| 113 | pinctrl-0 = <&spi_gpio_pins>; |
| 114 | |
| 115 | sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; |
| 116 | miso-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; |
| 117 | mosi-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; |
| 118 | cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| 119 | num-chipselects = <1>; |
| 120 | |
| 121 | /* lcd panel */ |
| 122 | lcd: td028ttec1@0 { |
| 123 | compatible = "tpo,td028ttec1"; |
| 124 | reg = <0>; |
| 125 | spi-max-frequency = <100000>; |
| 126 | spi-cpol; |
| 127 | spi-cpha; |
| 128 | |
| 129 | backlight = <&backlight>; |
| 130 | label = "lcd"; |
| 131 | port { |
| 132 | lcd_in: endpoint { |
| 133 | remote-endpoint = <&dpi_out>; |
| 134 | }; |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | |
| 139 | backlight: backlight { |
| 140 | compatible = "pwm-backlight"; |
| 141 | pwms = <&pwm11 0 12000000 0>; |
| 142 | pwm-names = "backlight"; |
| 143 | brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>; |
| 144 | default-brightness-level = <9>; /* => 90 */ |
| 145 | pinctrl-names = "default"; |
| 146 | pinctrl-0 = <&backlight_pins>; |
| 147 | }; |
| 148 | |
| 149 | pwm11: pwm-11 { |
| 150 | compatible = "ti,omap-dmtimer-pwm"; |
| 151 | ti,timers = <&timer11>; |
| 152 | #pwm-cells = <3>; |
| 153 | ti,clock-source = <0x01>; |
| 154 | }; |
| 155 | |
| 156 | hsusb2_phy: hsusb2-phy-pins { |
| 157 | compatible = "usb-nop-xceiv"; |
| 158 | reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; |
| 159 | #phy-cells = <0>; |
| 160 | }; |
| 161 | |
| 162 | tv0: connector { |
| 163 | compatible = "composite-video-connector"; |
| 164 | label = "tv"; |
| 165 | |
| 166 | port { |
| 167 | tv_connector_in: endpoint { |
| 168 | remote-endpoint = <&opa_out>; |
| 169 | }; |
| 170 | }; |
| 171 | }; |
| 172 | |
| 173 | tv_amp: opa362 { |
| 174 | compatible = "ti,opa362"; |
| 175 | enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; /* GPIO_23 to enable video out amplifier */ |
| 176 | |
| 177 | ports { |
| 178 | #address-cells = <1>; |
| 179 | #size-cells = <0>; |
| 180 | |
| 181 | port@0 { |
| 182 | reg = <0>; |
| 183 | opa_in: endpoint { |
| 184 | remote-endpoint = <&venc_out>; |
| 185 | }; |
| 186 | }; |
| 187 | |
| 188 | port@1 { |
| 189 | reg = <1>; |
| 190 | opa_out: endpoint { |
| 191 | remote-endpoint = <&tv_connector_in>; |
| 192 | }; |
| 193 | }; |
| 194 | }; |
| 195 | }; |
| 196 | |
| 197 | wifi_pwrseq: wifi_pwrseq { |
| 198 | compatible = "mmc-pwrseq-simple"; |
| 199 | reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>; /* W2CBW003 reset through tca6507 */ |
| 200 | }; |
| 201 | |
| 202 | /* devconf0 setup for mcbsp1 clock pins */ |
| 203 | pinmux@48002274 { |
| 204 | compatible = "pinctrl-single"; |
| 205 | reg = <0x48002274 4>; /* CONTROL_DEVCONF0 */ |
| 206 | #address-cells = <1>; |
| 207 | #size-cells = <0>; |
| 208 | pinctrl-single,bit-per-mux; |
| 209 | pinctrl-single,register-width = <32>; |
| 210 | pinctrl-single,function-mask = <0x7>; /* MCBSP1 CLK pinmux */ |
| 211 | #pinctrl-cells = <2>; |
| 212 | pinctrl-names = "default"; |
| 213 | pinctrl-0 = <&mcbsp1_devconf0_pins>; |
| 214 | mcbsp1_devconf0_pins: mcbsp1-devconf0-pins { |
| 215 | /* offset bits mask */ |
| 216 | pinctrl-single,bits = <0x00 0x08 0x1c>; /* set MCBSP1_CLKR */ |
| 217 | }; |
| 218 | }; |
| 219 | |
| 220 | /* devconf1 setup for tvout pins */ |
| 221 | pinmux@480022d8 { |
| 222 | compatible = "pinctrl-single"; |
| 223 | reg = <0x480022d8 4>; /* CONTROL_DEVCONF1 */ |
| 224 | #address-cells = <1>; |
| 225 | #size-cells = <0>; |
| 226 | pinctrl-single,bit-per-mux; |
| 227 | pinctrl-single,register-width = <32>; |
| 228 | pinctrl-single,function-mask = <0x81>; /* TV out pin control */ |
| 229 | #pinctrl-cells = <2>; |
| 230 | pinctrl-names = "default"; |
| 231 | pinctrl-0 = <&tv_acbias_devconf1_pins>; |
| 232 | tv_acbias_devconf1_pins: tv-acbias-devconf1-pins { |
| 233 | /* offset bits mask */ |
| 234 | pinctrl-single,bits = <0x00 0x40800 0x40800>; /* set TVOUTBYPASS and TVOUTACEN */ |
| 235 | }; |
| 236 | }; |
| 237 | }; |
| 238 | |
| 239 | &omap3_pmx_wkup { |
| 240 | gpio1_pins: gpio1-pins { |
| 241 | pinctrl-single,pins = < |
| 242 | OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ |
| 243 | OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */ |
| 244 | >; |
| 245 | }; |
| 246 | }; |
| 247 | |
| 248 | &omap3_pmx_core { |
| 249 | pinctrl-names = "default"; |
| 250 | pinctrl-0 = < |
| 251 | &hsusb2_pins |
| 252 | >; |
| 253 | |
| 254 | hsusb2_pins: hsusb2-pins { |
| 255 | pinctrl-single,pins = < |
| 256 | OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ |
| 257 | OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ |
| 258 | OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ |
| 259 | OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ |
| 260 | OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ |
| 261 | OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ |
| 262 | >; |
| 263 | }; |
| 264 | |
| 265 | uart1_pins: uart1-pins { |
| 266 | pinctrl-single,pins = < |
| 267 | OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ |
| 268 | OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ |
| 269 | >; |
| 270 | }; |
| 271 | |
| 272 | uart2_pins: uart2-pins { |
| 273 | pinctrl-single,pins = < |
| 274 | OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ |
| 275 | OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ |
| 276 | >; |
| 277 | }; |
| 278 | |
| 279 | uart3_pins: uart3-pins { |
| 280 | pinctrl-single,pins = < |
| 281 | OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ |
| 282 | OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ |
| 283 | >; |
| 284 | }; |
| 285 | |
| 286 | mmc1_pins: mmc1-pins { |
| 287 | pinctrl-single,pins = < |
| 288 | OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ |
| 289 | OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ |
| 290 | OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ |
| 291 | OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ |
| 292 | OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ |
| 293 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ |
| 294 | >; |
| 295 | }; |
| 296 | |
| 297 | backlight_pins: backlight-pinmux-pins { |
| 298 | pinctrl-single,pins = < |
| 299 | OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3) /* gpt11/gpio57 */ |
| 300 | >; |
| 301 | }; |
| 302 | |
| 303 | dss_dpi_pins: dss-dpi-pins { |
| 304 | pinctrl-single,pins = < |
| 305 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ |
| 306 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ |
| 307 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ |
| 308 | OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ |
| 309 | OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ |
| 310 | OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ |
| 311 | OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ |
| 312 | OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ |
| 313 | OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ |
| 314 | OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ |
| 315 | OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ |
| 316 | OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ |
| 317 | OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ |
| 318 | OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ |
| 319 | OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ |
| 320 | OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ |
| 321 | OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ |
| 322 | OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ |
| 323 | OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ |
| 324 | OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ |
| 325 | OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ |
| 326 | OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ |
| 327 | OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ |
| 328 | OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ |
| 329 | OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ |
| 330 | OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ |
| 331 | OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ |
| 332 | OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ |
| 333 | >; |
| 334 | }; |
| 335 | |
| 336 | gps_pins: gps-pins { |
| 337 | pinctrl-single,pins = < |
| 338 | OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */ |
| 339 | >; |
| 340 | }; |
| 341 | |
| 342 | hdq_pins: hdq-pins { |
| 343 | pinctrl-single,pins = < |
| 344 | OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */ |
| 345 | >; |
| 346 | }; |
| 347 | |
| 348 | bmp085_pins: bmp085-pins { |
| 349 | pinctrl-single,pins = < |
| 350 | OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */ |
| 351 | >; |
| 352 | }; |
| 353 | |
| 354 | bma180_pins: bma180-pins { |
| 355 | pinctrl-single,pins = < |
| 356 | OMAP3_CORE1_IOPAD(0x213a, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio115 */ |
| 357 | >; |
| 358 | }; |
| 359 | |
| 360 | itg3200_pins: itg3200-pins { |
| 361 | pinctrl-single,pins = < |
| 362 | OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio56 */ |
| 363 | >; |
| 364 | }; |
| 365 | |
| 366 | hmc5843_pins: hmc5843-pins { |
| 367 | pinctrl-single,pins = < |
| 368 | OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */ |
| 369 | >; |
| 370 | }; |
| 371 | |
| 372 | penirq_pins: penirq-pins { |
| 373 | pinctrl-single,pins = < |
| 374 | /* here we could enable to wakeup the cpu from suspend by a pen touch */ |
| 375 | OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */ |
| 376 | >; |
| 377 | }; |
| 378 | |
| 379 | camera_pins: camera-pins { |
| 380 | pinctrl-single,pins = < |
| 381 | /* set up parallel camera interface */ |
| 382 | OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */ |
| 383 | OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */ |
| 384 | OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */ |
| 385 | OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */ |
| 386 | OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */ |
| 387 | OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */ |
| 388 | OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */ |
| 389 | OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */ |
| 390 | OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */ |
| 391 | OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */ |
| 392 | OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */ |
| 393 | OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */ |
| 394 | OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */ |
| 395 | OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */ |
| 396 | OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */ |
| 397 | OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ |
| 398 | OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ |
| 399 | OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */ |
| 400 | OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */ |
| 401 | OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */ |
| 402 | >; |
| 403 | }; |
| 404 | |
| 405 | mcbsp1_pins: mcbsp1-pins { |
| 406 | pinctrl-single,pins = < |
| 407 | OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */ |
| 408 | OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_clkr.mcbsp1_fsr */ |
| 409 | OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */ |
| 410 | OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */ |
| 411 | /* mcbsp_clks is used as PENIRQ */ |
| 412 | /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0) mcbsp_clks.mcbsp_clks */ |
| 413 | OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */ |
| 414 | OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */ |
| 415 | >; |
| 416 | }; |
| 417 | |
| 418 | mcbsp2_pins: mcbsp2-pins { |
| 419 | pinctrl-single,pins = < |
| 420 | OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ |
| 421 | OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_clkx */ |
| 422 | OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dr */ |
| 423 | OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dx */ |
| 424 | >; |
| 425 | }; |
| 426 | |
| 427 | mcbsp3_pins: mcbsp3-pins { |
| 428 | pinctrl-single,pins = < |
| 429 | OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dx */ |
| 430 | OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dr */ |
| 431 | OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_clkx */ |
| 432 | OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_fsx */ |
| 433 | >; |
| 434 | }; |
| 435 | |
| 436 | mcbsp4_pins: mcbsp4-pins { |
| 437 | pinctrl-single,pins = < |
| 438 | OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_clkx */ |
| 439 | OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_dr */ |
| 440 | OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_dx.mcbsp4_fsx */ |
| 441 | >; |
| 442 | }; |
| 443 | }; |
| 444 | |
| 445 | &omap3_pmx_core2 { |
| 446 | pinctrl-names = "default"; |
| 447 | pinctrl-0 = < |
| 448 | &hsusb2_2_pins |
| 449 | >; |
| 450 | |
| 451 | hsusb2_2_pins: hsusb2-2-pins { |
| 452 | pinctrl-single,pins = < |
| 453 | OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ |
| 454 | OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ |
| 455 | OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ |
| 456 | OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ |
| 457 | OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ |
| 458 | OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ |
| 459 | >; |
| 460 | }; |
| 461 | |
| 462 | spi_gpio_pins: spi-gpio-pinmux-pins { |
| 463 | pinctrl-single,pins = < |
| 464 | OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */ |
| 465 | OMAP3630_CORE2_IOPAD(0x25e6, PIN_OUTPUT | MUX_MODE4) /* cs */ |
| 466 | OMAP3630_CORE2_IOPAD(0x25e8, PIN_OUTPUT | MUX_MODE4) /* tx */ |
| 467 | OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE4) /* rx */ |
| 468 | >; |
| 469 | }; |
| 470 | }; |
| 471 | |
| 472 | &i2c1 { |
| 473 | clock-frequency = <2600000>; |
| 474 | |
| 475 | twl: twl@48 { |
| 476 | reg = <0x48>; |
| 477 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ |
| 478 | interrupt-parent = <&intc>; |
| 479 | |
| 480 | clocks = <&hfclk_26m>; |
| 481 | clock-names = "fck"; |
| 482 | |
| 483 | twl_audio: audio { |
| 484 | compatible = "ti,twl4030-audio"; |
| 485 | ti,enable-vibra = <1>; |
| 486 | codec { |
| 487 | ti,ramp_delay_value = <3>; |
| 488 | }; |
| 489 | }; |
| 490 | |
| 491 | twl_power: power { |
| 492 | compatible = "ti,twl4030-power-idle"; |
| 493 | ti,system-power-controller; |
| 494 | }; |
| 495 | }; |
| 496 | }; |
| 497 | |
| 498 | #include "twl4030.dtsi" |
| 499 | #include "twl4030_omap3.dtsi" |
| 500 | |
| 501 | &i2c2 { |
| 502 | clock-frequency = <400000>; |
| 503 | |
| 504 | /* pressure sensor */ |
| 505 | bmp085@77 { |
| 506 | compatible = "bosch,bmp085"; |
| 507 | reg = <0x77>; |
| 508 | pinctrl-names = "default"; |
| 509 | pinctrl-0 = <&bmp085_pins>; |
| 510 | interrupt-parent = <&gpio4>; |
| 511 | interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */ |
| 512 | vdda-supply = <&vio>; |
| 513 | vddd-supply = <&vio>; |
| 514 | }; |
| 515 | |
| 516 | /* accelerometer */ |
| 517 | bma180@41 { |
| 518 | compatible = "bosch,bma180"; |
| 519 | reg = <0x41>; |
| 520 | pinctrl-names = "default"; |
| 521 | pinctrl-0 = <&bma180_pins>; |
| 522 | interrupt-parent = <&gpio4>; |
| 523 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */ |
| 524 | }; |
| 525 | |
| 526 | /* gyroscope */ |
| 527 | itg3200@68 { |
| 528 | compatible = "invensense,itg3200"; |
| 529 | reg = <0x68>; |
| 530 | pinctrl-names = "default"; |
| 531 | pinctrl-0 = <&itg3200_pins>; |
| 532 | interrupt-parent = <&gpio2>; |
| 533 | interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* GPIO_56 */ |
| 534 | }; |
| 535 | |
| 536 | /* leds + gpios */ |
| 537 | tca6507: tca6507@45 { |
| 538 | compatible = "ti,tca6507"; |
| 539 | #address-cells = <1>; |
| 540 | #size-cells = <0>; |
| 541 | reg = <0x45>; |
| 542 | |
| 543 | gpio-controller; |
| 544 | #gpio-cells = <2>; |
| 545 | |
| 546 | gta04_led0: led@0 { |
| 547 | label = "gta04:red:aux"; |
| 548 | reg = <0x0>; |
| 549 | }; |
| 550 | |
| 551 | gta04_led1: led@1 { |
| 552 | label = "gta04:green:aux"; |
| 553 | reg = <0x1>; |
| 554 | }; |
| 555 | |
| 556 | gta04_led3: led@3 { |
| 557 | label = "gta04:red:power"; |
| 558 | reg = <0x3>; |
| 559 | linux,default-trigger = "default-on"; |
| 560 | }; |
| 561 | |
| 562 | gta04_led4: led@4 { |
| 563 | label = "gta04:green:power"; |
| 564 | reg = <0x4>; |
| 565 | }; |
| 566 | |
| 567 | wifi_reset: led@6 { |
| 568 | /* reference as <&tca_gpios 0 0> since it is currently the only GPIO */ |
| 569 | reg = <0x6>; |
| 570 | compatible = "gpio"; |
| 571 | }; |
| 572 | }; |
| 573 | |
| 574 | /* compass aka magnetometer */ |
| 575 | hmc5843@1e { |
| 576 | compatible = "honeywell,hmc5883l"; |
| 577 | reg = <0x1e>; |
| 578 | pinctrl-names = "default"; |
| 579 | pinctrl-0 = <&hmc5843_pins>; |
| 580 | interrupt-parent = <&gpio4>; |
| 581 | interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* gpio112 */ |
| 582 | }; |
| 583 | |
| 584 | /* touchscreen */ |
| 585 | tsc2007@48 { |
| 586 | compatible = "ti,tsc2007"; |
| 587 | reg = <0x48>; |
| 588 | pinctrl-names = "default"; |
| 589 | pinctrl-0 = <&penirq_pins>; |
| 590 | interrupt-parent = <&gpio6>; |
| 591 | interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */ |
| 592 | gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* GPIO_160 */ |
| 593 | ti,x-plate-ohms = <600>; |
| 594 | touchscreen-size-x = <480>; |
| 595 | touchscreen-size-y = <640>; |
| 596 | touchscreen-max-pressure = <1000>; |
| 597 | touchscreen-fuzz-x = <3>; |
| 598 | touchscreen-fuzz-y = <8>; |
| 599 | touchscreen-fuzz-pressure = <10>; |
| 600 | touchscreen-inverted-y; |
| 601 | }; |
| 602 | |
| 603 | /* RFID EEPROM */ |
| 604 | m24lr64@50 { |
| 605 | compatible = "atmel,24c64"; |
| 606 | reg = <0x50>; |
| 607 | }; |
| 608 | }; |
| 609 | |
| 610 | &i2c3 { |
| 611 | clock-frequency = <100000>; |
| 612 | }; |
| 613 | |
| 614 | &mcspi1 { |
| 615 | status = "disabled"; |
| 616 | }; |
| 617 | |
| 618 | &mcspi2 { |
| 619 | status = "disabled"; |
| 620 | }; |
| 621 | |
| 622 | &mcspi3 { |
| 623 | status = "disabled"; |
| 624 | }; |
| 625 | |
| 626 | &mcspi4 { |
| 627 | status = "disabled"; |
| 628 | }; |
| 629 | |
| 630 | &usb_otg_hs { |
| 631 | interface-type = <0>; |
| 632 | usb-phy = <&usb2_phy>; |
| 633 | phys = <&usb2_phy>; |
| 634 | phy-names = "usb2-phy"; |
| 635 | mode = <3>; |
| 636 | power = <50>; |
| 637 | }; |
| 638 | |
| 639 | &usbhshost { |
| 640 | port2-mode = "ehci-phy"; |
| 641 | }; |
| 642 | |
| 643 | &usbhsehci { |
| 644 | phys = <0 &hsusb2_phy>; |
| 645 | }; |
| 646 | |
| 647 | &mmc1 { |
| 648 | pinctrl-names = "default"; |
| 649 | pinctrl-0 = <&mmc1_pins>; |
| 650 | vmmc-supply = <&vmmc1>; |
| 651 | bus-width = <4>; |
| 652 | ti,non-removable; |
| 653 | broken-cd; /* hardware has no CD */ |
| 654 | }; |
| 655 | |
| 656 | &mmc2 { |
| 657 | vmmc-supply = <&vaux4>; |
| 658 | bus-width = <4>; |
| 659 | ti,non-removable; |
| 660 | cap-power-off-card; |
| 661 | mmc-pwrseq = <&wifi_pwrseq>; |
| 662 | }; |
| 663 | |
| 664 | &mmc3 { |
| 665 | status = "disabled"; |
| 666 | }; |
| 667 | |
| 668 | #define BIT(x) (1 << (x)) |
| 669 | &twl_gpio { |
| 670 | /* pullups: BIT(2) */ |
| 671 | ti,pullups = <BIT(2)>; |
| 672 | /* |
| 673 | * pulldowns: |
| 674 | * BIT(0), BIT(1), BIT(6), BIT(7), BIT(8), BIT(13) |
| 675 | * BIT(15), BIT(16), BIT(17) |
| 676 | */ |
| 677 | ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) | |
| 678 | BIT(13) | BIT(15) | BIT(16) | BIT(17))>; |
| 679 | }; |
| 680 | |
| 681 | &twl_keypad { |
| 682 | status = "disabled"; |
| 683 | }; |
| 684 | |
| 685 | &gpio1 { |
| 686 | pinctrl-names = "default"; |
| 687 | pinctrl-0 = <&gpio1_pins>; |
| 688 | }; |
| 689 | |
| 690 | &uart1 { |
| 691 | pinctrl-names = "default"; |
| 692 | pinctrl-0 = <&uart1_pins>; |
| 693 | }; |
| 694 | |
| 695 | &uart2 { |
| 696 | pinctrl-names = "default"; |
| 697 | pinctrl-0 = <&uart2_pins>; |
| 698 | gnss: gnss { |
| 699 | compatible = "wi2wi,w2sg0004"; |
| 700 | pinctrl-names = "default"; |
| 701 | pinctrl-0 = <&gps_pins>; |
| 702 | sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; |
| 703 | lna-supply = <&vsim>; |
| 704 | vcc-supply = <&ldo_3v3>; |
| 705 | }; |
| 706 | }; |
| 707 | |
| 708 | &uart3 { |
| 709 | pinctrl-names = "default"; |
| 710 | pinctrl-0 = <&uart3_pins>; |
| 711 | interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; |
| 712 | }; |
| 713 | |
| 714 | &charger { |
| 715 | ti,bb-uvolt = <3200000>; |
| 716 | ti,bb-uamp = <150>; |
| 717 | }; |
| 718 | |
| 719 | /* spare */ |
| 720 | &vaux1 { |
| 721 | regulator-min-microvolt = <2500000>; |
| 722 | regulator-max-microvolt = <3000000>; |
| 723 | }; |
| 724 | |
| 725 | /* sensors */ |
| 726 | &vaux2 { |
| 727 | regulator-min-microvolt = <2800000>; |
| 728 | regulator-max-microvolt = <2800000>; |
| 729 | regulator-always-on; /* we should never switch off while vio is on! */ |
| 730 | }; |
| 731 | |
| 732 | /* camera */ |
| 733 | &vaux3 { |
| 734 | regulator-min-microvolt = <2500000>; |
| 735 | regulator-max-microvolt = <2500000>; |
| 736 | }; |
| 737 | |
| 738 | /* WLAN/BT */ |
| 739 | &vaux4 { |
| 740 | regulator-min-microvolt = <2800000>; |
| 741 | regulator-max-microvolt = <3150000>; |
| 742 | }; |
| 743 | |
| 744 | /* GPS LNA */ |
| 745 | &vsim { |
| 746 | regulator-min-microvolt = <2800000>; |
| 747 | regulator-max-microvolt = <3150000>; |
| 748 | }; |
| 749 | |
| 750 | /* Needed to power the DPI pins */ |
| 751 | |
| 752 | &vpll2 { |
| 753 | regulator-always-on; |
| 754 | }; |
| 755 | |
| 756 | &dss { |
| 757 | pinctrl-names = "default"; |
| 758 | pinctrl-0 = < &dss_dpi_pins >; |
| 759 | |
| 760 | status = "okay"; |
| 761 | vdds_dsi-supply = <&vpll2>; |
| 762 | |
| 763 | port { |
| 764 | dpi_out: endpoint { |
| 765 | remote-endpoint = <&lcd_in>; |
| 766 | data-lines = <24>; |
| 767 | }; |
| 768 | }; |
| 769 | }; |
| 770 | |
| 771 | &venc { |
| 772 | status = "okay"; |
| 773 | |
| 774 | vdda-supply = <&vdac>; |
| 775 | |
| 776 | port { |
| 777 | venc_out: endpoint { |
| 778 | remote-endpoint = <&opa_in>; |
| 779 | ti,channels = <1>; |
| 780 | ti,invert-polarity; |
| 781 | }; |
| 782 | }; |
| 783 | }; |
| 784 | |
| 785 | &gpmc { |
| 786 | ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ |
| 787 | |
| 788 | nand@0,0 { |
| 789 | compatible = "ti,omap2-nand"; |
| 790 | reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ |
| 791 | interrupt-parent = <&gpmc>; |
| 792 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ |
| 793 | <1 IRQ_TYPE_NONE>; /* termcount */ |
| 794 | ti,nand-ecc-opt = "ham1"; |
| 795 | rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ |
| 796 | nand-bus-width = <16>; |
| 797 | #address-cells = <1>; |
| 798 | #size-cells = <1>; |
| 799 | |
| 800 | gpmc,device-width = <2>; |
| 801 | gpmc,cs-on-ns = <0>; |
| 802 | gpmc,cs-rd-off-ns = <44>; |
| 803 | gpmc,cs-wr-off-ns = <44>; |
| 804 | gpmc,adv-on-ns = <6>; |
| 805 | gpmc,adv-rd-off-ns = <34>; |
| 806 | gpmc,adv-wr-off-ns = <44>; |
| 807 | gpmc,oe-off-ns = <54>; |
| 808 | gpmc,we-off-ns = <40>; |
| 809 | gpmc,access-ns = <64>; |
| 810 | gpmc,rd-cycle-ns = <82>; |
| 811 | gpmc,wr-cycle-ns = <82>; |
| 812 | gpmc,wr-access-ns = <40>; |
| 813 | gpmc,wr-data-mux-bus-ns = <0>; |
| 814 | gpmc,sync-clk-ps = <0>; |
| 815 | |
| 816 | x-loader@0 { |
| 817 | label = "X-Loader"; |
| 818 | reg = <0 0x80000>; |
| 819 | }; |
| 820 | |
| 821 | bootloaders@80000 { |
| 822 | label = "U-Boot"; |
| 823 | reg = <0x80000 0x1c0000>; |
| 824 | }; |
| 825 | |
| 826 | bootloaders_env@240000 { |
| 827 | label = "U-Boot Env"; |
| 828 | reg = <0x240000 0x40000>; |
| 829 | }; |
| 830 | |
| 831 | kernel@280000 { |
| 832 | label = "Kernel"; |
| 833 | reg = <0x280000 0x600000>; |
| 834 | }; |
| 835 | |
| 836 | filesystem@880000 { |
| 837 | label = "File System"; |
| 838 | reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ |
| 839 | }; |
| 840 | }; |
| 841 | }; |
| 842 | |
| 843 | &mcbsp1 { /* FM Transceiver PCM */ |
| 844 | status = "okay"; |
| 845 | #sound-dai-cells = <0>; |
| 846 | pinctrl-names = "default"; |
| 847 | pinctrl-0 = <&mcbsp1_pins>; |
| 848 | }; |
| 849 | |
| 850 | &mcbsp2 { /* TPS65950 I2S */ |
| 851 | status = "okay"; |
| 852 | pinctrl-names = "default"; |
| 853 | pinctrl-0 = <&mcbsp2_pins>; |
| 854 | }; |
| 855 | |
| 856 | &mcbsp3 { /* Bluetooth PCM */ |
| 857 | status = "okay"; |
| 858 | #sound-dai-cells = <0>; |
| 859 | pinctrl-names = "default"; |
| 860 | pinctrl-0 = <&mcbsp3_pins>; |
| 861 | }; |
| 862 | |
| 863 | &mcbsp4 { /* GSM voice PCM */ |
| 864 | status = "okay"; |
| 865 | #sound-dai-cells = <0>; |
| 866 | pinctrl-names = "default"; |
| 867 | pinctrl-0 = <&mcbsp4_pins>; |
| 868 | }; |
| 869 | |
| 870 | &hdqw1w { |
| 871 | pinctrl-names = "default"; |
| 872 | pinctrl-0 = <&hdq_pins>; |
| 873 | }; |
| 874 | |
| 875 | /* image signal processor within OMAP3 SoC */ |
| 876 | &isp { |
| 877 | ports { |
| 878 | port@0 { |
| 879 | reg = <0>; |
| 880 | parallel_ep: endpoint { |
| 881 | ti,isp-clock-divisor = <1>; |
| 882 | ti,strobe-mode; |
| 883 | bus-width = <8>;/* Used data lines */ |
| 884 | data-shift = <2>; /* Lines 9:2 are used */ |
| 885 | hsync-active = <0>; /* Active low */ |
| 886 | vsync-active = <1>; /* Active high */ |
| 887 | data-active = <1>;/* Active high */ |
| 888 | pclk-sample = <1>;/* Falling */ |
| 889 | }; |
| 890 | }; |
| 891 | /* port@1 and port@2 are not used by GTA04 */ |
| 892 | }; |
| 893 | }; |