blob: f1135e887f7b8c9f885823b5582cf41879e3abac [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * DTS file for SPEAr300 SoC
4 *
5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 */
7
8/include/ "spear3xx.dtsi"
9
10/ {
11 ahb {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "simple-bus";
15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd0000000 0x30000000>;
17
18 pinmux@99000000 {
19 compatible = "st,spear300-pinmux";
20 reg = <0x99000000 0x1000>;
21 };
22
23 clcd@60000000 {
24 compatible = "arm,pl110", "arm,primecell";
25 reg = <0x60000000 0x1000>;
26 interrupts = <30>;
27 status = "disabled";
28 };
29
30 fsmc: flash@94000000 {
31 compatible = "st,spear600-fsmc-nand";
32 #address-cells = <1>;
33 #size-cells = <1>;
34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
38 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
39 status = "disabled";
40 };
41
42 sdhci@70000000 {
43 compatible = "st,sdhci-spear";
44 reg = <0x70000000 0x100>;
45 interrupts = <1>;
46 status = "disabled";
47 };
48
49 shirq: interrupt-controller@50000000 {
50 compatible = "st,spear300-shirq";
51 reg = <0x50000000 0x1000>;
52 interrupts = <28>;
53 #interrupt-cells = <1>;
54 interrupt-controller;
55 };
56
57 apb {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "simple-bus";
61 ranges = <0xa0000000 0xa0000000 0x10000000
62 0xd0000000 0xd0000000 0x30000000>;
63
64 gpio1: gpio@a9000000 {
65 #gpio-cells = <2>;
66 compatible = "arm,pl061", "arm,primecell";
67 gpio-controller;
68 reg = <0xa9000000 0x1000>;
69 interrupts = <8>;
70 interrupt-parent = <&shirq>;
71 status = "disabled";
72 };
73
74 kbd@a0000000 {
75 compatible = "st,spear300-kbd";
76 reg = <0xa0000000 0x1000>;
77 interrupts = <7>;
78 interrupt-parent = <&shirq>;
79 status = "disabled";
80 };
81 };
82 };
83};