Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | |
| 3 | /* |
| 4 | * Device tree file for ZII's SPB4 board |
| 5 | * |
| 6 | * SPB - Seat Power Box |
| 7 | * |
| 8 | * Copyright (C) 2019 Zodiac Inflight Innovations |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | #include "vf610.dtsi" |
| 13 | |
| 14 | / { |
| 15 | model = "ZII VF610 SPB4 Board"; |
| 16 | compatible = "zii,vf610spb4", "zii,vf610dev", "fsl,vf610"; |
| 17 | |
| 18 | chosen { |
| 19 | stdout-path = &uart0; |
| 20 | }; |
| 21 | |
| 22 | memory@80000000 { |
| 23 | device_type = "memory"; |
| 24 | reg = <0x80000000 0x20000000>; |
| 25 | }; |
| 26 | |
| 27 | gpio-leds { |
| 28 | compatible = "gpio-leds"; |
| 29 | pinctrl-0 = <&pinctrl_leds_debug>; |
| 30 | pinctrl-names = "default"; |
| 31 | |
| 32 | led-debug { |
| 33 | label = "zii:green:debug1"; |
| 34 | gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; |
| 35 | linux,default-trigger = "heartbeat"; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu { |
| 40 | compatible = "regulator-fixed"; |
| 41 | regulator-name = "vcc_3v3_mcu"; |
| 42 | regulator-min-microvolt = <3300000>; |
| 43 | regulator-max-microvolt = <3300000>; |
| 44 | }; |
| 45 | |
| 46 | supply-voltage-monitor { |
| 47 | compatible = "iio-hwmon"; |
| 48 | io-channels = <&adc0 8>, /* 28V_SW */ |
| 49 | <&adc0 9>, /* +3.3V */ |
| 50 | <&adc1 8>, /* VCC_1V5 */ |
| 51 | <&adc1 9>; /* VCC_1V2 */ |
| 52 | }; |
| 53 | }; |
| 54 | |
| 55 | &adc0 { |
| 56 | vref-supply = <®_vcc_3v3_mcu>; |
| 57 | status = "okay"; |
| 58 | }; |
| 59 | |
| 60 | &adc1 { |
| 61 | vref-supply = <®_vcc_3v3_mcu>; |
| 62 | status = "okay"; |
| 63 | }; |
| 64 | |
| 65 | &dspi1 { |
| 66 | bus-num = <1>; |
| 67 | pinctrl-names = "default"; |
| 68 | pinctrl-0 = <&pinctrl_dspi1>; |
| 69 | status = "okay"; |
| 70 | |
| 71 | flash@0 { |
| 72 | #address-cells = <1>; |
| 73 | #size-cells = <1>; |
| 74 | compatible = "m25p128", "jedec,spi-nor"; |
| 75 | reg = <0>; |
| 76 | spi-max-frequency = <50000000>; |
| 77 | }; |
| 78 | }; |
| 79 | |
| 80 | &edma0 { |
| 81 | status = "okay"; |
| 82 | }; |
| 83 | |
| 84 | &edma1 { |
| 85 | status = "okay"; |
| 86 | }; |
| 87 | |
| 88 | &esdhc0 { |
| 89 | pinctrl-names = "default"; |
| 90 | pinctrl-0 = <&pinctrl_esdhc0>; |
| 91 | bus-width = <8>; |
| 92 | non-removable; |
| 93 | no-1-8-v; |
| 94 | keep-power-in-suspend; |
| 95 | no-sdio; |
| 96 | no-sd; |
| 97 | status = "okay"; |
| 98 | }; |
| 99 | |
| 100 | &esdhc1 { |
| 101 | pinctrl-names = "default"; |
| 102 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 103 | bus-width = <4>; |
| 104 | no-sdio; |
| 105 | status = "okay"; |
| 106 | }; |
| 107 | |
| 108 | &fec1 { |
| 109 | phy-mode = "rmii"; |
| 110 | pinctrl-names = "default"; |
| 111 | pinctrl-0 = <&pinctrl_fec1>; |
| 112 | status = "okay"; |
| 113 | |
| 114 | fixed-link { |
| 115 | speed = <100>; |
| 116 | full-duplex; |
| 117 | }; |
| 118 | |
| 119 | mdio1: mdio { |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <0>; |
| 122 | clock-frequency = <12500000>; |
| 123 | suppress-preamble; |
| 124 | status = "okay"; |
| 125 | |
| 126 | switch0: switch0@0 { |
| 127 | compatible = "marvell,mv88e6190"; |
| 128 | pinctrl-0 = <&pinctrl_gpio_switch0>; |
| 129 | pinctrl-names = "default"; |
| 130 | reg = <0>; |
| 131 | eeprom-length = <65536>; |
| 132 | interrupt-parent = <&gpio3>; |
| 133 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
| 134 | interrupt-controller; |
| 135 | #interrupt-cells = <2>; |
| 136 | |
| 137 | ports { |
| 138 | #address-cells = <1>; |
| 139 | #size-cells = <0>; |
| 140 | |
| 141 | port@0 { |
| 142 | reg = <0>; |
| 143 | phy-mode = "rmii"; |
| 144 | ethernet = <&fec1>; |
| 145 | |
| 146 | fixed-link { |
| 147 | speed = <100>; |
| 148 | full-duplex; |
| 149 | }; |
| 150 | }; |
| 151 | |
| 152 | port@1 { |
| 153 | reg = <1>; |
| 154 | label = "eth_cu_1000_1"; |
| 155 | }; |
| 156 | |
| 157 | port@2 { |
| 158 | reg = <2>; |
| 159 | label = "eth_cu_1000_2"; |
| 160 | }; |
| 161 | |
| 162 | port@3 { |
| 163 | reg = <3>; |
| 164 | label = "eth_cu_1000_3"; |
| 165 | }; |
| 166 | |
| 167 | port@4 { |
| 168 | reg = <4>; |
| 169 | label = "eth_cu_1000_4"; |
| 170 | }; |
| 171 | |
| 172 | port@5 { |
| 173 | reg = <5>; |
| 174 | label = "eth_cu_1000_5"; |
| 175 | }; |
| 176 | |
| 177 | port@6 { |
| 178 | reg = <6>; |
| 179 | label = "eth_cu_1000_6"; |
| 180 | }; |
| 181 | }; |
| 182 | }; |
| 183 | }; |
| 184 | }; |
| 185 | |
| 186 | &i2c0 { |
| 187 | clock-frequency = <100000>; |
| 188 | pinctrl-names = "default"; |
| 189 | pinctrl-0 = <&pinctrl_i2c0>; |
| 190 | status = "okay"; |
| 191 | |
| 192 | io-expander@22 { |
| 193 | compatible = "nxp,pca9554"; |
| 194 | reg = <0x22>; |
| 195 | gpio-controller; |
| 196 | #gpio-cells = <2>; |
| 197 | }; |
| 198 | |
| 199 | eeprom@50 { |
| 200 | compatible = "atmel,24c04"; |
| 201 | reg = <0x50>; |
| 202 | label = "nameplate"; |
| 203 | }; |
| 204 | |
| 205 | eeprom@52 { |
| 206 | compatible = "atmel,24c04"; |
| 207 | reg = <0x52>; |
| 208 | }; |
| 209 | }; |
| 210 | |
| 211 | &i2c1 { |
| 212 | clock-frequency = <100000>; |
| 213 | pinctrl-names = "default"; |
| 214 | pinctrl-0 = <&pinctrl_i2c1>; |
| 215 | status = "okay"; |
| 216 | |
| 217 | watchdog@38 { |
| 218 | compatible = "zii,rave-wdt"; |
| 219 | reg = <0x38>; |
| 220 | }; |
| 221 | }; |
| 222 | |
| 223 | &snvsrtc { |
| 224 | status = "disabled"; |
| 225 | }; |
| 226 | |
| 227 | &uart0 { |
| 228 | pinctrl-names = "default"; |
| 229 | pinctrl-0 = <&pinctrl_uart0>; |
| 230 | status = "okay"; |
| 231 | }; |
| 232 | |
| 233 | &uart1 { |
| 234 | pinctrl-names = "default"; |
| 235 | pinctrl-0 = <&pinctrl_uart1>; |
| 236 | status = "okay"; |
| 237 | }; |
| 238 | |
| 239 | &uart2 { |
| 240 | pinctrl-names = "default"; |
| 241 | pinctrl-0 = <&pinctrl_uart2>; |
| 242 | status = "okay"; |
| 243 | |
| 244 | mcu { |
| 245 | compatible = "zii,rave-sp-rdu2"; |
| 246 | current-speed = <1000000>; |
| 247 | #address-cells = <1>; |
| 248 | #size-cells = <1>; |
| 249 | |
| 250 | watchdog { |
| 251 | compatible = "zii,rave-sp-watchdog"; |
| 252 | }; |
| 253 | |
| 254 | eeprom@a3 { |
| 255 | compatible = "zii,rave-sp-eeprom"; |
| 256 | reg = <0xa3 0x4000>; |
| 257 | #address-cells = <1>; |
| 258 | #size-cells = <1>; |
| 259 | zii,eeprom-name = "main-eeprom"; |
| 260 | }; |
| 261 | }; |
| 262 | }; |
| 263 | |
| 264 | &uart3 { |
| 265 | pinctrl-names = "default"; |
| 266 | pinctrl-0 = <&pinctrl_uart3>; |
| 267 | status = "okay"; |
| 268 | }; |
| 269 | |
| 270 | &wdoga5 { |
| 271 | status = "disabled"; |
| 272 | }; |
| 273 | |
| 274 | &iomuxc { |
| 275 | pinctrl_dspi1: dspi1grp { |
| 276 | fsl,pins = < |
| 277 | VF610_PAD_PTD5__DSPI1_CS0 0x1182 |
| 278 | VF610_PAD_PTD4__DSPI1_CS1 0x1182 |
| 279 | VF610_PAD_PTC6__DSPI1_SIN 0x1181 |
| 280 | VF610_PAD_PTC7__DSPI1_SOUT 0x1182 |
| 281 | VF610_PAD_PTC8__DSPI1_SCK 0x1182 |
| 282 | >; |
| 283 | }; |
| 284 | |
| 285 | pinctrl_esdhc0: esdhc0grp { |
| 286 | fsl,pins = < |
| 287 | VF610_PAD_PTC0__ESDHC0_CLK 0x31ef |
| 288 | VF610_PAD_PTC1__ESDHC0_CMD 0x31ef |
| 289 | VF610_PAD_PTC2__ESDHC0_DAT0 0x31ef |
| 290 | VF610_PAD_PTC3__ESDHC0_DAT1 0x31ef |
| 291 | VF610_PAD_PTC4__ESDHC0_DAT2 0x31ef |
| 292 | VF610_PAD_PTC5__ESDHC0_DAT3 0x31ef |
| 293 | VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef |
| 294 | VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef |
| 295 | VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef |
| 296 | VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef |
| 297 | >; |
| 298 | }; |
| 299 | |
| 300 | pinctrl_esdhc1: esdhc1grp { |
| 301 | fsl,pins = < |
| 302 | VF610_PAD_PTA24__ESDHC1_CLK 0x31ef |
| 303 | VF610_PAD_PTA25__ESDHC1_CMD 0x31ef |
| 304 | VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef |
| 305 | VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef |
| 306 | VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef |
| 307 | VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef |
| 308 | >; |
| 309 | }; |
| 310 | |
| 311 | pinctrl_fec1: fec1grp { |
| 312 | fsl,pins = < |
| 313 | VF610_PAD_PTA6__RMII_CLKIN 0x30d1 |
| 314 | VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |
| 315 | VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 |
| 316 | VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 |
| 317 | VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 |
| 318 | VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 |
| 319 | VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 |
| 320 | VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 |
| 321 | VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 |
| 322 | VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 |
| 323 | >; |
| 324 | }; |
| 325 | |
| 326 | pinctrl_gpio_switch0: pinctrl-gpio-switch0 { |
| 327 | fsl,pins = < |
| 328 | VF610_PAD_PTB28__GPIO_98 0x219d |
| 329 | >; |
| 330 | }; |
| 331 | |
| 332 | pinctrl_i2c0: i2c0grp { |
| 333 | fsl,pins = < |
| 334 | VF610_PAD_PTB14__I2C0_SCL 0x37ff |
| 335 | VF610_PAD_PTB15__I2C0_SDA 0x37ff |
| 336 | >; |
| 337 | }; |
| 338 | |
| 339 | pinctrl_i2c1: i2c1grp { |
| 340 | fsl,pins = < |
| 341 | VF610_PAD_PTB16__I2C1_SCL 0x37ff |
| 342 | VF610_PAD_PTB17__I2C1_SDA 0x37ff |
| 343 | >; |
| 344 | }; |
| 345 | |
| 346 | pinctrl_leds_debug: pinctrl-leds-debug { |
| 347 | fsl,pins = < |
| 348 | VF610_PAD_PTD3__GPIO_82 0x31c2 |
| 349 | >; |
| 350 | }; |
| 351 | |
| 352 | pinctrl_uart0: uart0grp { |
| 353 | fsl,pins = < |
| 354 | VF610_PAD_PTB10__UART0_TX 0x21a2 |
| 355 | VF610_PAD_PTB11__UART0_RX 0x21a1 |
| 356 | >; |
| 357 | }; |
| 358 | |
| 359 | pinctrl_uart1: uart1grp { |
| 360 | fsl,pins = < |
| 361 | VF610_PAD_PTB23__UART1_TX 0x21a2 |
| 362 | VF610_PAD_PTB24__UART1_RX 0x21a1 |
| 363 | >; |
| 364 | }; |
| 365 | |
| 366 | pinctrl_uart2: uart2grp { |
| 367 | fsl,pins = < |
| 368 | VF610_PAD_PTD0__UART2_TX 0x21a2 |
| 369 | VF610_PAD_PTD1__UART2_RX 0x21a1 |
| 370 | >; |
| 371 | }; |
| 372 | |
| 373 | pinctrl_uart3: uart3grp { |
| 374 | fsl,pins = < |
| 375 | VF610_PAD_PTA30__UART3_TX 0x21a2 |
| 376 | VF610_PAD_PTA31__UART3_RX 0x21a1 |
| 377 | >; |
| 378 | }; |
| 379 | }; |