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git01.mediatek.com / filogic / uboot / 53633a893a06bd5a0c807287d9cc29337806eaf7 / . / src / arm / nxp / imx / imx6ul-ccimx6ulsom.dtsi
blob: 4a03ea6d24dc6f0d532d10e60557e1c8b109e748 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Digi International's ConnectCore 6UL System-On-Module device tree source
4 *
5 * Copyright 2018 Digi International, Inc.
6 *
7 */
8
9/ {
10 memory@80000000 {
11 device_type = "memory";
12 reg = <0x80000000 0>; /* will be filled by U-Boot */
13 };
14
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges;
19
20 linux,cma {
21 compatible = "shared-dma-pool";
22 reusable;
23 size = <0x4000000>;
24 linux,cma-default;
25 };
26 };
27};
28
29&adc1 {
30 vref-supply = <&vdda_adc_3v3>;
31};
32
33&gpmi {
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_gpmi_nand>;
36 status = "okay";
37};
38
39&i2c1 {
40 clock-frequency = <100000>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_i2c1>;
43 status = "okay";
44
45 pfuze3000: pmic@8 {
46 compatible = "fsl,pfuze3000";
47 reg = <0x08>;
48
49 regulators {
50 int_3v3: sw1a {
51 regulator-min-microvolt = <700000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-ramp-delay = <6250>;
54 regulator-boot-on;
55 regulator-always-on;
56
57 regulator-state-mem {
58 regulator-off-in-suspend;
59 };
60 };
61
62 vdd_arm_soc_in: sw1b {
63 regulator-min-microvolt = <700000>;
64 regulator-max-microvolt = <1475000>;
65 regulator-ramp-delay = <6250>;
66 regulator-boot-on;
67 regulator-always-on;
68
69 regulator-state-mem {
70 regulator-on-in-suspend;
71 regulator-suspend-microvolt = <925000>;
72 };
73 };
74
75 ext_3v3: sw2 {
76 regulator-min-microvolt = <2500000>;
77 regulator-max-microvolt = <3300000>;
78 regulator-ramp-delay = <6250>;
79 regulator-always-on;
80 regulator-boot-on;
81
82 regulator-state-mem {
83 regulator-off-in-suspend;
84 };
85 };
86
87 vcc_ddr3: sw3 {
88 regulator-min-microvolt = <900000>;
89 regulator-max-microvolt = <1650000>;
90 regulator-always-on;
91 regulator-boot-on;
92
93 regulator-state-mem {
94 regulator-on-in-suspend;
95 regulator-suspend-microvolt = <1300000>;
96 };
97 };
98
99 swbst_reg: swbst {
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5150000>;
102 };
103
104 vdd_snvs_3v3: vsnvs {
105 regulator-min-microvolt = <1000000>;
106 regulator-max-microvolt = <3000000>;
107 regulator-boot-on;
108 regulator-always-on;
109 };
110
111 vrefddr: vrefddr {
112 regulator-boot-on;
113 regulator-always-on;
114 };
115
116 vdda_adc_3v3: vldo1 {
117 regulator-name = "vref-adc-3v3";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
120 regulator-always-on;
121
122 regulator-state-mem {
123 regulator-off-in-suspend;
124 };
125 };
126
127 ldo2_ext: vldo2 {
128 regulator-min-microvolt = <800000>;
129 regulator-max-microvolt = <1550000>;
130 };
131
132 vdda_wlan: vccsd {
133 regulator-min-microvolt = <2850000>;
134 regulator-max-microvolt = <3300000>;
135 regulator-always-on;
136 regulator-boot-on;
137
138 regulator-state-mem {
139 regulator-off-in-suspend;
140 };
141 };
142
143 vdd_high_in: v33 {
144 regulator-min-microvolt = <2850000>;
145 regulator-max-microvolt = <3300000>;
146 regulator-boot-on;
147 regulator-always-on;
148 };
149
150 ldo3_int: vldo3 {
151 regulator-min-microvolt = <1800000>;
152 regulator-max-microvolt = <3300000>;
153 };
154
155 ldo4_ext: vldo4 {
156 regulator-min-microvolt = <1800000>;
157 regulator-max-microvolt = <3300000>;
158 };
159
160 vcoin_chg: coin {
161 regulator-min-microvolt = <2500000>;
162 regulator-max-microvolt = <3300000>;
163 };
164 };
165 };
166};
167
168/* UART1 (Bluetooth) */
169&uart1 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_uart1>;
172 uart-has-rtscts;
173 status = "okay";
174};
175
176/* USDHC1 (Wireless) */
177&usdhc1 {
178 pinctrl-names = "default", "sleep";
179 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_wifibt_ctrl>;
180 pinctrl-1 = <&pinctrl_usdhc1_sleep &pinctrl_wifibt_ctrl_sleep>;
181 non-removable;
182 no-1-8-v;
183 bus-width = <4>;
184 status = "okay";
185};
186
187&iomuxc {
188 pinctrl_gpmi_nand: gpmigrp {
189 fsl,pins = <
190 MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
191 MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
192 MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
193 MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
194 MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
195 MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
196 MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
197 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
198 MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
199 MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
200 MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
201 MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
202 MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
203 MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
204 MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb0b1
205 >;
206 };
207
208 pinctrl_i2c1: i2c1grp {
209 fsl,pins = <
210 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
211 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
212 >;
213 };
214
215 pinctrl_uart1: uart1grp {
216 fsl,pins = <
217 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
218 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
219 MX6UL_PAD_UART1_RTS_B__UART1_DCE_RTS 0x1b0b1
220 MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS 0x1b0b1
221 >;
222 };
223
224 pinctrl_usdhc1: usdhc1grp {
225 fsl,pins = <
226 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
227 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17051
228 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
229 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
230 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
231 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
232 >;
233 };
234
235 pinctrl_usdhc1_sleep: usdhc1grp-sleep {
236 fsl,pins = <
237 MX6UL_PAD_SD1_CMD__GPIO2_IO16 0x3000
238 MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x3000
239 MX6UL_PAD_SD1_DATA0__GPIO2_IO18 0x3000
240 MX6UL_PAD_SD1_DATA1__GPIO2_IO19 0x3000
241 MX6UL_PAD_SD1_DATA2__GPIO2_IO20 0x3000
242 MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x3000
243 >;
244 };
245
246 pinctrl_wifibt_ctrl: wifibt-ctrl-grp {
247 fsl,pins = <
248 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x08a0
249 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x08a0
250 >;
251 };
252
253 pinctrl_wifibt_ctrl_sleep: wifibt-ctrl-grp-sleep {
254 fsl,pins = <
255 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x3000
256 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3000
257 >;
258 };
259};
260
261&reg_arm {
262 vin-supply = <&vdd_arm_soc_in>;
263 regulator-allow-bypass;
264};
265
266&reg_soc {
267 vin-supply = <&vdd_arm_soc_in>;
268 regulator-allow-bypass;
269};