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git01.mediatek.com / filogic / uboot / 53633a893a06bd5a0c807287d9cc29337806eaf7 / . / src / arm / nxp / imx / imx6dl-yapp43-common.dtsi
blob: 52a0f6ee426f973b8f38259f2525fee6f797ded0 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (C) 2021 Y Soft Corporation, a.s.
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/input/input.h>
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/pwm/pwm.h>
10
11/ {
12 aliases: aliases {
13 ethernet1 = &eth1;
14 ethernet2 = &eth2;
15 mmc0 = &usdhc3;
16 mmc1 = &usdhc4;
17 };
18
19 backlight: backlight {
20 compatible = "pwm-backlight";
21 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
22 brightness-levels = <0 32 64 128 255>;
23 default-brightness-level = <32>;
24 num-interpolated-steps = <8>;
25 power-supply = <&sw2_reg>;
26 status = "disabled";
27 };
28
29 gpio_keys: gpio-keys {
30 compatible = "gpio-keys";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_gpio_keys>;
33 status = "disabled";
34
35 button {
36 label = "Factory RESET";
37 linux,code = <BTN_0>;
38 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
39 };
40 };
41
42 lcd_display: display {
43 compatible = "fsl,imx-parallel-display";
44 #address-cells = <1>;
45 #size-cells = <0>;
46 interface-pix-fmt = "rgb24";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_ipu1>;
49 status = "disabled";
50
51 port@0 {
52 reg = <0>;
53
54 lcd_display_in: endpoint {
55 remote-endpoint = <&ipu1_di0_disp0>;
56 };
57 };
58
59 port@1 {
60 reg = <1>;
61
62 lcd_display_out: endpoint {
63 remote-endpoint = <&lcd_panel_in>;
64 };
65 };
66 };
67
68 panel: panel {
69 compatible = "dataimage,scf0700c48ggu18";
70 power-supply = <&sw2_reg>;
71 backlight = <&backlight>;
72 enable-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
73 status = "disabled";
74
75 port {
76 lcd_panel_in: endpoint {
77 remote-endpoint = <&lcd_display_out>;
78 };
79 };
80 };
81
82 reg_usb_h1_vbus: regulator-usb-h1-vbus {
83 compatible = "regulator-fixed";
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_usbh1_vbus>;
86 regulator-name = "usb_h1_vbus";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 status = "disabled";
92 };
93
94 reg_usb_otg_vbus: regulator-usb-otg-vbus {
95 compatible = "regulator-fixed";
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_usbotg_vbus>;
98 regulator-name = "usb_otg_vbus";
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
102 enable-active-high;
103 };
104};
105
106&fec {
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_enet>;
109 phy-mode = "rgmii-id";
110 phy-supply = <&sw2_reg>;
111 status = "okay";
112
113 fixed-link {
114 speed = <1000>;
115 full-duplex;
116 };
117
118 mdio {
119 #address-cells = <1>;
120 #size-cells = <0>;
121
122 switch@0 {
123 compatible = "marvell,mv88e6085";
124 reg = <0>;
125 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
126
127 switch_ports: ports {
128 #address-cells = <1>;
129 #size-cells = <0>;
130
131 ethphy0: port@0 {
132 reg = <0>;
133 label = "cpu";
134 phy-mode = "rgmii-id";
135 ethernet = <&fec>;
136
137 fixed-link {
138 speed = <1000>;
139 full-duplex;
140 };
141 };
142
143 eth2: port@1 {
144 reg = <1>;
145 label = "eth2";
146 phy-handle = <&phy_port1>;
147 };
148
149 eth1: port@2 {
150 reg = <2>;
151 label = "eth1";
152 phy-handle = <&phy_port2>;
153 };
154 };
155
156 mdio {
157 #address-cells = <1>;
158 #size-cells = <0>;
159
160 phy_port1: switchphy@11 {
161 reg = <0x11>;
162 };
163
164 phy_port2: switchphy@12 {
165 reg = <0x12>;
166 };
167 };
168 };
169 };
170};
171
172&i2c2 {
173 clock-frequency = <100000>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c2>;
176 status = "okay";
177
178 pmic@8 {
179 compatible = "fsl,pfuze200";
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_pmic>;
182 reg = <0x8>;
183
184 regulators {
185 sw1a_reg: sw1ab {
186 regulator-min-microvolt = <300000>;
187 regulator-max-microvolt = <1875000>;
188 regulator-boot-on;
189 regulator-always-on;
190 regulator-ramp-delay = <6250>;
191 };
192
193 sw2_reg: sw2 {
194 regulator-min-microvolt = <800000>;
195 regulator-max-microvolt = <3300000>;
196 regulator-boot-on;
197 regulator-always-on;
198 };
199
200 sw3a_reg: sw3a {
201 regulator-min-microvolt = <400000>;
202 regulator-max-microvolt = <1975000>;
203 regulator-boot-on;
204 regulator-always-on;
205 };
206
207 sw3b_reg: sw3b {
208 regulator-min-microvolt = <400000>;
209 regulator-max-microvolt = <1975000>;
210 regulator-boot-on;
211 regulator-always-on;
212 };
213
214 swbst_reg: swbst {
215 regulator-min-microvolt = <5000000>;
216 regulator-max-microvolt = <5150000>;
217 };
218
219 vgen1_reg: vgen1 {
220 regulator-min-microvolt = <800000>;
221 regulator-max-microvolt = <1550000>;
222 };
223
224 vgen2_reg: vgen2 {
225 regulator-min-microvolt = <800000>;
226 regulator-max-microvolt = <1550000>;
227 };
228
229 vgen3_reg: vgen3 {
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-always-on;
233 };
234
235 vgen4_reg: vgen4 {
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <3300000>;
238 regulator-always-on;
239 };
240
241 vgen5_reg: vgen5 {
242 regulator-min-microvolt = <1800000>;
243 regulator-max-microvolt = <3300000>;
244 regulator-always-on;
245 };
246
247 vgen6_reg: vgen6 {
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <3300000>;
250 regulator-always-on;
251 };
252
253 vref_reg: vrefddr {
254 regulator-boot-on;
255 regulator-always-on;
256 };
257
258 vsnvs_reg: vsnvs {
259 regulator-min-microvolt = <1000000>;
260 regulator-max-microvolt = <3000000>;
261 regulator-boot-on;
262 regulator-always-on;
263 };
264 };
265 };
266
267 leds: led-controller@30 {
268 compatible = "ti,lp5562";
269 reg = <0x30>;
270 clock-mode = /bits/ 8 <1>;
271 #address-cells = <1>;
272 #size-cells = <0>;
273 status = "disabled";
274
275 led@0 {
276 chan-name = "R";
277 led-cur = /bits/ 8 <0x20>;
278 max-cur = /bits/ 8 <0x60>;
279 reg = <0>;
280 color = <LED_COLOR_ID_RED>;
281 };
282
283 led@1 {
284 chan-name = "G";
285 led-cur = /bits/ 8 <0x20>;
286 max-cur = /bits/ 8 <0x60>;
287 reg = <1>;
288 color = <LED_COLOR_ID_GREEN>;
289 };
290
291 led@2 {
292 chan-name = "B";
293 led-cur = /bits/ 8 <0x20>;
294 max-cur = /bits/ 8 <0x60>;
295 reg = <2>;
296 color = <LED_COLOR_ID_BLUE>;
297 };
298 };
299
300 eeprom@57 {
301 compatible = "atmel,24c128";
302 reg = <0x57>;
303 pagesize = <64>;
304 };
305
306 touchscreen: touchscreen@5c {
307 compatible = "pixcir,pixcir_tangoc";
308 reg = <0x5c>;
309 pinctrl-0 = <&pinctrl_touch>;
310 interrupt-parent = <&gpio4>;
311 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
312 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
313 reset-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
314 touchscreen-size-x = <800>;
315 touchscreen-size-y = <480>;
316 status = "disabled";
317 };
318
319 rtc: rtc@68 {
320 compatible = "dallas,ds1341";
321 reg = <0x68>;
322 };
323};
324
325&i2c3 {
326 clock-frequency = <100000>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_i2c3>;
329 status = "disabled";
330
331 oled_1309: oled@3c {
332 compatible = "solomon,ssd1309fb-i2c";
333 reg = <0x3c>;
334 solomon,height = <64>;
335 solomon,width = <128>;
336 solomon,page-offset = <0>;
337 solomon,segment-no-remap;
338 solomon,prechargep2 = <15>;
339 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
340 vbat-supply = <&sw2_reg>;
341 status = "disabled";
342 };
343
344 oled_1305: oled@3d {
345 compatible = "solomon,ssd1305fb-i2c";
346 reg = <0x3d>;
347 solomon,height = <64>;
348 solomon,width = <128>;
349 solomon,page-offset = <0>;
350 solomon,col-offset = <4>;
351 solomon,prechargep2 = <15>;
352 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
353 vbat-supply = <&sw2_reg>;
354 status = "disabled";
355 };
356
357 gpio_oled: gpio@41 {
358 compatible = "nxp,pca9536";
359 gpio-controller;
360 #gpio-cells = <2>;
361 reg = <0x41>;
362 vcc-supply = <&sw2_reg>;
363 status = "disabled";
364 };
365
366 touchkeys: keys@5a {
367 compatible = "fsl,mpr121-touchkey";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_touchkeys>;
370 reg = <0x5a>;
371 vdd-supply = <&sw2_reg>;
372 autorepeat;
373 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
374 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
375 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
376 poll-interval = <50>;
377 status = "disabled";
378 };
379};
380
381&iomuxc {
382 pinctrl_enet: enetgrp {
383 fsl,pins = <
384 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020
385 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020
386 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
387 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020
388 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020
389 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020
390 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020
391 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020
392 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020
393 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020
394 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020
395 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020
396 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020
397 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020
398 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010
399 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010
400 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098
401 >;
402 };
403
404 pinctrl_gpio_keys: gpiokeysgrp {
405 fsl,pins = <
406 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
407 >;
408 };
409
410 pinctrl_i2c2: i2c2grp {
411 fsl,pins = <
412 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
413 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
414 >;
415 };
416
417 pinctrl_i2c3: i2c3grp {
418 fsl,pins = <
419 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899
420 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
421 >;
422 };
423
424 pinctrl_ipu1: ipu1grp {
425 fsl,pins = <
426 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b0
427 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
428 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
429 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
430 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
431 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
432 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
433 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
434 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
435 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
436 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
437 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
438 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
439 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
440 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
441 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
442 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
443 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
444 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
445 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
446 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
447 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
448 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
449 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
450 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
451 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
452 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
453 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
454 >;
455 };
456
457 pinctrl_pmic: pmicgrp {
458 fsl,pins = <
459 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098
460 >;
461 };
462
463 pinctrl_pwm1: pwm1grp {
464 fsl,pins = <
465 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
466 >;
467 };
468
469 pinctrl_touch: touchgrp {
470 fsl,pins = <
471 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098
472 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098
473 >;
474 };
475
476 pinctrl_touchkeys: touchkeysgrp {
477 fsl,pins = <
478 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098
479 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b098
480 >;
481 };
482
483 pinctrl_uart1: uart1grp {
484 fsl,pins = <
485 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8
486 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8
487 >;
488 };
489
490 pinctrl_uart2: uart2grp {
491 fsl,pins = <
492 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098
493 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098
494 >;
495 };
496
497 pinctrl_usbh1: usbh1grp {
498 fsl,pins = <
499 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098
500 >;
501 };
502
503 pinctrl_usbh1_vbus: usbh1-vbus {
504 fsl,pins = <
505 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98
506 >;
507 };
508
509 pinctrl_usbotg: usbotggrp {
510 fsl,pins = <
511 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098
512 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098
513 >;
514 };
515
516 pinctrl_usbotg_vbus: usbotg-vbus {
517 fsl,pins = <
518 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98
519 >;
520 };
521
522 pinctrl_usdhc4: usdhc4grp {
523 fsl,pins = <
524 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069
525 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069
526 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069
527 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069
528 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069
529 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069
530 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069
531 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069
532 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069
533 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069
534 >;
535 };
536
537 pinctrl_wdog: wdoggrp {
538 fsl,pins = <
539 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
540 >;
541 };
542};
543
544&ipu1_di0_disp0 {
545 remote-endpoint = <&lcd_display_in>;
546};
547
548&pwm1 {
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_pwm1>;
551 status = "disabled";
552};
553
554&uart1 {
555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_uart1>;
557 status = "okay";
558};
559
560&uart2 {
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_uart2>;
563 status = "disabled";
564};
565
566&usbh1 {
567 pinctrl-names = "default";
568 pinctrl-0 = <&pinctrl_usbh1>;
569 vbus-supply = <&reg_usb_h1_vbus>;
570 over-current-active-low;
571 status = "disabled";
572};
573
574&usbotg {
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_usbotg>;
577 vbus-supply = <&reg_usb_otg_vbus>;
578 over-current-active-low;
579 srp-disable;
580 hnp-disable;
581 adp-disable;
582 status = "okay";
583};
584
585&usbphy1 {
586 fsl,tx-d-cal = <106>;
587 status = "okay";
588};
589
590&usbphy2 {
591 fsl,tx-d-cal = <109>;
592 status = "disabled";
593};
594
595&usdhc4 {
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_usdhc4>;
598 bus-width = <8>;
599 non-removable;
600 no-1-8-v;
601 keep-power-in-suspend;
602 vmmc-supply = <&sw2_reg>;
603 status = "okay";
604};
605
606&wdog1 {
607 status = "disabled";
608};
609
610&wdog2 {
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_wdog>;
613 fsl,ext-reset-output;
614 status = "okay";
615};