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git01.mediatek.com / filogic / uboot / 53633a893a06bd5a0c807287d9cc29337806eaf7 / . / src / arm / nuvoton / nuvoton-npcm730-kudo.dts
blob: 5787ae95d3b43600ea6ca56953ffc017850544c9 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2020 Fii USA Inc.
3
4/dts-v1/;
5#include "nuvoton-npcm730.dtsi"
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10 model = "Fii Kudo Board";
11 compatible = "fii,kudo", "nuvoton,npcm730";
12
13 aliases {
14 ethernet1 = &gmac0;
15 serial0 = &serial0;
16 serial1 = &serial1;
17 serial2 = &serial2;
18 serial3 = &serial3;
19 i2c1 = &i2c1;
20 i2c2 = &i2c2;
21 i2c3 = &i2c3;
22 i2c4 = &i2c4;
23 i2c5 = &i2c5;
24 i2c6 = &i2c6;
25 i2c7 = &i2c7;
26 i2c8 = &i2c8;
27 i2c9 = &i2c9;
28 i2c10 = &i2c10;
29 i2c11 = &i2c11;
30 i2c12 = &i2c12;
31 i2c13 = &i2c13;
32 i2c14 = &i2c14;
33 i2c15 = &i2c15;
34 spi0 = &spi0;
35 spi1 = &spi1;
36 fiu0 = &fiu0;
37 fiu1 = &fiu3;
38 };
39
40 chosen {
41 stdout-path = &serial3;
42 };
43
44 memory {
45 reg = <0 0x40000000>;
46 };
47
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
51 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
52 };
53
54 jtag_master {
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
57 #size-cells = <1>;
58
59 // dev/jtag0
60 dev-num = <0>;
61 // pspi or gpio
62 mode = "pspi";
63
64 // pspi2
65 pspi-controller = <2>;
66 reg = <0xf0201000 0x1000>;
67 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
68 clocks = <&clk NPCM7XX_CLK_APB5>;
69
70 // TCK, TDI, TDO, TMS
71 jtag-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>,
72 <&gpio0 18 GPIO_ACTIVE_HIGH>,
73 <&gpio0 17 GPIO_ACTIVE_HIGH>,
74 <&gpio0 16 GPIO_ACTIVE_HIGH>;
75 };
76
77 leds {
78 compatible = "gpio-leds";
79 heartbeat {
80 label = "heartbeat";
81 gpios = <&gpio0 14 1>;
82 };
83 };
84
85 pinctrl: pinctrl@f0800000 {
86 gpio61oh_pins: gpio61oh-pins {
87 pins = "GPO61/nDTR1_BOUT1/STRAP6";
88 bias-disable;
89 output-high;
90 };
91 gpio62oh_pins: gpio62oh-pins {
92 pins = "GPO62/nRTST1/STRAP5";
93 bias-disable;
94 output-high;
95 };
96 gpio161ol_pins: gpio161ol-pins {
97 pins = "GPIO161/nLFRAME/nESPICS";
98 bias-disable;
99 output-low;
100 };
101 gpio163i_pins: gpio163i-pins {
102 pins = "GPIO163/LCLK/ESPICLK";
103 bias-disable;
104 input-enable;
105 };
106 gpio167ol_pins: gpio167ol-pins {
107 pins = "GPIO167/LAD3/ESPI_IO3";
108 bias-disable;
109 output-low;
110 };
111 gpio95i_pins: gpio95i-pins {
112 pins = "GPIO95/nLRESET/nESPIRST";
113 bias-disable;
114 input-enable;
115 };
116 gpio65ol_pins: gpio65ol-pins {
117 pins = "GPIO65/FANIN1";
118 bias-disable;
119 output-low;
120 };
121 gpio66oh_pins: gpio66oh-pins {
122 pins = "GPIO66/FANIN2";
123 bias-disable;
124 output-high;
125 };
126 gpio67oh_pins: gpio67oh-pins {
127 pins = "GPIO67/FANIN3";
128 bias-disable;
129 output-high;
130 };
131 gpio68ol_pins: gpio68ol-pins {
132 pins = "GPIO68/FANIN4";
133 bias-disable;
134 output-low;
135 };
136 gpio69i_pins: gpio69i-pins {
137 pins = "GPIO69/FANIN5";
138 bias-disable;
139 input-enable;
140 };
141 gpio70ol_pins: gpio70ol-pins {
142 pins = "GPIO70/FANIN6";
143 bias-disable;
144 output-low;
145 };
146 gpio71i_pins: gpio71i-pins {
147 pins = "GPIO71/FANIN7";
148 bias-disable;
149 input-enable;
150 };
151 gpio72i_pins: gpio72i-pins {
152 pins = "GPIO72/FANIN8";
153 bias-disable;
154 input-enable;
155 };
156 gpio73i_pins: gpio73i-pins {
157 pins = "GPIO73/FANIN9";
158 bias-disable;
159 input-enable;
160 };
161 gpio74i_pins: gpio74i-pins {
162 pins = "GPIO74/FANIN10";
163 bias-disable;
164 input-enable;
165 };
166 gpio75i_pins: gpio75i-pins {
167 pins = "GPIO75/FANIN11";
168 bias-disable;
169 input-enable;
170 };
171 gpio76i_pins: gpio76i-pins {
172 pins = "GPIO76/FANIN12";
173 bias-disable;
174 input-enable;
175 };
176 gpio77i_pins: gpio77i-pins {
177 pins = "GPIO77/FANIN13";
178 bias-disable;
179 input-enable;
180 };
181 gpio78i_pins: gpio78i-pins {
182 pins = "GPIO78/FANIN14";
183 bias-disable;
184 input-enable;
185 };
186 gpio79ol_pins: gpio79ol-pins {
187 pins = "GPIO79/FANIN15";
188 bias-disable;
189 output-low;
190 };
191 gpio80oh_pins: gpio80oh-pins {
192 pins = "GPIO80/PWM0";
193 bias-disable;
194 output-high;
195 };
196 gpio81i_pins: gpio81i-pins {
197 pins = "GPIO81/PWM1";
198 bias-disable;
199 input-enable;
200 };
201 gpio82i_pins: gpio82i-pins {
202 pins = "GPIO82/PWM2";
203 bias-disable;
204 input-enable;
205 };
206 gpio83i_pins: gpio83i-pins {
207 pins = "GPIO83/PWM3";
208 bias-disable;
209 input-enable;
210 };
211 gpio144i_pins: gpio144i-pins {
212 pins = "GPIO144/PWM4";
213 bias-disable;
214 input-enable;
215 };
216 gpio145i_pins: gpio145i-pins {
217 pins = "GPIO145/PWM5";
218 bias-disable;
219 input-enable;
220 };
221 gpio146i_pins: gpio146i-pins {
222 pins = "GPIO146/PWM6";
223 bias-disable;
224 input-enable;
225 };
226 gpio147oh_pins: gpio147oh-pins {
227 pins = "GPIO147/PWM7";
228 bias-disable;
229 output-high;
230 };
231 gpio168ol_pins: gpio168ol-pins {
232 pins = "GPIO168/nCLKRUN/nESPIALERT";
233 bias-disable;
234 output-low;
235 };
236 gpio169oh_pins: gpio169oh-pins {
237 pins = "GPIO169/nSCIPME";
238 bias-disable;
239 output-high;
240 };
241 gpio170ol_pins: gpio170ol-pins {
242 pins = "GPIO170/nSMI";
243 bias-disable;
244 output-low;
245 };
246 gpio218oh_pins: gpio218oh-pins {
247 pins = "GPIO218/nWDO1";
248 bias-disable;
249 output-high;
250 };
251 gpio37i_pins: gpio37i-pins {
252 pins = "GPIO37/SMB3CSDA";
253 bias-disable;
254 input-enable;
255 };
256 gpio38i_pins: gpio38i-pins {
257 pins = "GPIO38/SMB3CSCL";
258 bias-disable;
259 input-enable;
260 };
261 gpio39i_pins: gpio39i-pins {
262 pins = "GPIO39/SMB3BSDA";
263 bias-disable;
264 input-enable;
265 };
266 gpio40i_pins: gpio40i-pins {
267 pins = "GPIO40/SMB3BSCL";
268 bias-disable;
269 input-enable;
270 };
271 gpio121i_pins: gpio121i-pins {
272 pins = "GPIO121/SMB2CSCL";
273 bias-disable;
274 input-enable;
275 };
276 gpio122i_pins: gpio122i-pins {
277 pins = "GPIO122/SMB2BSDA";
278 bias-disable;
279 input-enable;
280 };
281 gpio123i_pins: gpio123i-pins {
282 pins = "GPIO123/SMB2BSCL";
283 bias-disable;
284 input-enable;
285 };
286 gpio124i_pins: gpio124i-pins {
287 pins = "GPIO124/SMB1CSDA";
288 bias-disable;
289 input-enable;
290 };
291 gpio125i_pins: gpio125i-pins {
292 pins = "GPIO125/SMB1CSCL";
293 bias-disable;
294 input-enable;
295 };
296 gpio126i_pins: gpio126i-pins {
297 pins = "GPIO126/SMB1BSDA";
298 bias-disable;
299 input-enable;
300 };
301 gpio127i_pins: gpio127i-pins {
302 pins = "GPIO127/SMB1BSCL";
303 bias-disable;
304 input-enable;
305 };
306 gpio136i_pins: gpio136i-pins {
307 pins = "GPIO136/SD1DT0";
308 bias-disable;
309 input-enable;
310 };
311 gpio137oh_pins: gpio137oh-pins {
312 pins = "GPIO137/SD1DT1";
313 bias-disable;
314 output-high;
315 };
316 gpio138i_pins: gpio138i-pins {
317 pins = "GPIO138/SD1DT2";
318 bias-disable;
319 input-enable;
320 };
321 gpio139i_pins: gpio139i-pins {
322 pins = "GPIO139/SD1DT3";
323 bias-disable;
324 input-enable;
325 };
326 gpio140i_pins: gpio140i-pins {
327 pins = "GPIO140/SD1CLK";
328 bias-disable;
329 input-enable;
330 };
331 gpio141i_pins: gpio141i-pins {
332 pins = "GPIO141/SD1WP";
333 bias-disable;
334 input-enable;
335 };
336 gpio190oh_pins: gpio190oh-pins {
337 pins = "GPIO190/nPRD_SMI";
338 bias-disable;
339 output-high;
340 };
341 gpio191oh_pins: gpio191oh-pins {
342 pins = "GPIO191";
343 bias-disable;
344 output-high;
345 };
346 gpio195ol_pins: gpio195ol-pins {
347 pins = "GPIO195/SMB0BSDA";
348 bias-disable;
349 output-low;
350 };
351 gpio196ol_pins: gpio196ol-pins {
352 pins = "GPIO196/SMB0CSCL";
353 bias-disable;
354 output-low;
355 };
356 gpio199i_pins: gpio199i-pins {
357 pins = "GPIO199/SMB0DSCL";
358 bias-disable;
359 input-enable;
360 };
361 gpio202ol_pins: gpio202ol-pins {
362 pins = "GPIO202/SMB0CSDA";
363 bias-disable;
364 output-low;
365 };
366 };
367};
368
369&gmac0 {
370 phy-mode = "rgmii-id";
371 snps,eee-force-disable;
372 status = "okay";
373};
374
375&ehci1 {
376 status = "okay";
377};
378
379&fiu0 {
380 pinctrl-names = "default";
381 pinctrl-0 = <&spi0cs1_pins>;
382 status = "okay";
383 flash@0 {
384 compatible = "jedec,spi-nor";
385 #address-cells = <1>;
386 #size-cells = <1>;
387 reg = <0>;
388 spi-max-frequency = <5000000>;
389 spi-rx-bus-width = <2>;
390 label = "bmc";
391 partitions {
392 compatible = "fixed-partitions";
393 #address-cells = <1>;
394 #size-cells = <1>;
395 u-boot@0 {
396 label = "u-boot";
397 reg = <0x0000000 0xC0000>;
398 read-only;
399 };
400 u-boot-env@100000 {
401 label = "u-boot-env";
402 reg = <0x00100000 0x40000>;
403 };
404 kernel@200000 {
405 label = "kernel";
406 reg = <0x0200000 0x600000>;
407 };
408 rofs@800000 {
409 label = "rofs";
410 reg = <0x800000 0x3500000>;
411 };
412 rwfs@3d00000 {
413 label = "rwfs";
414 reg = <0x3d00000 0x300000>;
415 };
416 };
417 };
418 flash@1 {
419 compatible = "jedec,spi-nor";
420 #address-cells = <1>;
421 #size-cells = <1>;
422 reg = <1>;
423 spi-max-frequency = <5000000>;
424 spi-rx-bus-width = <2>;
425 partitions {
426 compatible = "fixed-partitions";
427 #address-cells = <1>;
428 #size-cells = <1>;
429 spare1@0 {
430 label = "spi0-cs1-spare1";
431 reg = <0x0 0x800000>;
432 };
433 spare2@800000 {
434 label = "spi0-cs1-spare2";
435 reg = <0x800000 0x0>;
436 };
437 };
438 };
439};
440
441&fiu3 {
442 pinctrl-0 = <&spi3_pins>;
443 flash@0 {
444 compatible = "jedec,spi-nor";
445 #address-cells = <1>;
446 #size-cells = <1>;
447 reg = <0>;
448 spi-max-frequency = <5000000>;
449 spi-rx-bus-width = <2>;
450 partitions {
451 compatible = "fixed-partitions";
452 #address-cells = <1>;
453 #size-cells = <1>;
454 system1@0 {
455 label = "bios";
456 reg = <0x0 0x0>;
457 };
458 system2@800000 {
459 label = "spi3-system2";
460 reg = <0x800000 0x0>;
461 };
462 };
463 };
464};
465
466&watchdog1 {
467 status = "okay";
468};
469
470&rng {
471 status = "okay";
472};
473
474&serial0 {
475 status = "okay";
476};
477
478&serial1 {
479 status = "okay";
480};
481
482&serial2 {
483 status = "okay";
484};
485
486&serial3 {
487 status = "okay";
488};
489
490&adc {
491 #io-channel-cells = <1>;
492 status = "okay";
493};
494
495&i2c1 {
496 status = "okay";
497 i2c-mux@75 {
498 compatible = "nxp,pca9548";
499 #address-cells = <1>;
500 #size-cells = <0>;
501 reg = <0x75>;
502 i2c-mux-idle-disconnect;
503
504 i2c@2 {
505 #address-cells = <1>;
506 #size-cells = <0>;
507 reg = <2>;
508
509 // Rear-Fan
510 max31790@58 {
511 compatible = "maxim,max31790";
512 reg = <0x58>;
513 };
514 };
515
516 i2c@3 {
517 #address-cells = <1>;
518 #size-cells = <0>;
519 reg = <3>;
520
521 // Mid-Fan
522 max31790@58 {
523 compatible = "maxim,max31790";
524 reg = <0x58>;
525 };
526 };
527
528 i2c-bus@4 {
529 #address-cells = <1>;
530 #size-cells = <0>;
531 reg = <4>;
532
533 // INLET1_T
534 lm75@5c {
535 compatible = "ti,lm75";
536 reg = <0x5c>;
537 };
538 };
539
540 i2c-bus@5 {
541 #address-cells = <1>;
542 #size-cells = <0>;
543 reg = <5>;
544
545 // OUTLET1_T
546 lm75@5c {
547 compatible = "ti,lm75";
548 reg = <0x5c>;
549 };
550 };
551
552 i2c-bus@6 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 reg = <6>;
556
557 // OUTLET2_T
558 lm75@5c {
559 compatible = "ti,lm75";
560 reg = <0x5c>;
561 };
562 };
563
564 i2c-bus@7 {
565 #address-cells = <1>;
566 #size-cells = <0>;
567 reg = <7>;
568
569 // OUTLET3_T
570 lm75@5c {
571 compatible = "ti,lm75";
572 reg = <0x5c>;
573 };
574 };
575 };
576 i2c-mux@77 {
577 compatible = "nxp,pca9548";
578 #address-cells = <1>;
579 #size-cells = <0>;
580 reg = <0x77>;
581 i2c-mux-idle-disconnect;
582
583 i2c-bus@2 {
584 #address-cells = <1>;
585 #size-cells = <0>;
586 reg = <2>;
587
588 // STB-T
589 pmbus@74 {
590 compatible = "pmbus";
591 reg = <0x74>;
592 };
593 };
594 };
595};
596
597&i2c2 {
598 status = "okay";
599 smpro@4f {
600 compatible = "ampere,smpro";
601 reg = <0x4f>;
602 };
603
604 smpro@4e {
605 compatible = "ampere,smpro";
606 reg = <0x4e>;
607 };
608};
609
610&i2c3 {
611 status = "okay";
612};
613
614&i2c4 {
615 status = "okay";
616 i2c-mux@77 {
617 compatible = "nxp,pca9548";
618 #address-cells = <1>;
619 #size-cells = <0>;
620 reg = <0x77>;
621 i2c-mux-idle-disconnect;
622
623 i2c-bus@0 {
624 #address-cells = <1>;
625 #size-cells = <0>;
626 reg = <0>;
627
628 // ADC sensors
629 adm1266@40 {
630 compatible = "adi,adm1266";
631 reg = <0x40>;
632 };
633 };
634
635 i2c-bus@1 {
636 #address-cells = <1>;
637 #size-cells = <0>;
638 reg = <1>;
639
640 // ADC sensors
641 adm1266@41 {
642 compatible = "adi,adm1266";
643 reg = <0x41>;
644 };
645 };
646 };
647};
648
649&i2c5 {
650 status = "okay";
651};
652
653&i2c6 {
654 status = "okay";
655};
656
657&i2c7 {
658 status = "okay";
659};
660
661&i2c8 {
662 status = "okay";
663};
664
665&i2c9 {
666 status = "okay";
667};
668
669&i2c10 {
670 status = "okay";
671};
672
673&i2c11 {
674 status = "okay";
675};
676
677&i2c12 {
678 status = "okay";
679 ssif-bmc@10 {
680 compatible = "ssif-bmc";
681 reg = <0x10>;
682 };
683};
684
685&i2c13 {
686 status = "okay";
687 i2c-mux@77 {
688 compatible = "nxp,pca9548";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 reg = <0x77>;
692 i2c-mux-idle-disconnect;
693
694 i2c-bus@3 {
695 #address-cells = <1>;
696 #size-cells = <0>;
697 reg = <3>;
698
699 // M2_ZONE_T
700 lm75@28 {
701 compatible = "ti,lm75";
702 reg = <0x28>;
703 };
704 };
705
706 i2c-bus@4 {
707 #address-cells = <1>;
708 #size-cells = <0>;
709 reg = <4>;
710
711 // BATT_ZONE_T
712 lm75@29 {
713 compatible = "ti,lm75";
714 reg = <0x29>;
715 };
716 };
717
718 i2c-bus@5 {
719 #address-cells = <1>;
720 #size-cells = <0>;
721 reg = <5>;
722
723 // NBM1_ZONE_T
724 lm75@28 {
725 compatible = "ti,lm75";
726 reg = <0x28>;
727 };
728 };
729 i2c-bus@6 {
730 #address-cells = <1>;
731 #size-cells = <0>;
732 reg = <6>;
733
734 // NBM2_ZONE_T
735 lm75@29 {
736 compatible = "ti,lm75";
737 reg = <0x29>;
738 };
739 };
740 };
741};
742
743&i2c14 {
744 status = "okay";
745};
746
747&i2c15 {
748 status = "okay";
749};
750
751&spi0 {
752 cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
753 status = "okay";
754};
755
756&pinctrl {
757 pinctrl-names = "default";
758 pinctrl-0 = <
759 &gpio61oh_pins
760 &gpio62oh_pins
761 &gpio161ol_pins
762 &gpio163i_pins
763 &gpio167ol_pins
764 &gpio95i_pins
765 &gpio65ol_pins
766 &gpio66oh_pins
767 &gpio67oh_pins
768 &gpio68ol_pins
769 &gpio69i_pins
770 &gpio70ol_pins
771 &gpio71i_pins
772 &gpio72i_pins
773 &gpio73i_pins
774 &gpio74i_pins
775 &gpio75i_pins
776 &gpio76i_pins
777 &gpio77i_pins
778 &gpio78i_pins
779 &gpio79ol_pins
780 &gpio80oh_pins
781 &gpio81i_pins
782 &gpio82i_pins
783 &gpio83i_pins
784 &gpio144i_pins
785 &gpio145i_pins
786 &gpio146i_pins
787 &gpio147oh_pins
788 &gpio168ol_pins
789 &gpio169oh_pins
790 &gpio170ol_pins
791 &gpio218oh_pins
792 &gpio37i_pins
793 &gpio38i_pins
794 &gpio39i_pins
795 &gpio40i_pins
796 &gpio121i_pins
797 &gpio122i_pins
798 &gpio123i_pins
799 &gpio124i_pins
800 &gpio125i_pins
801 &gpio126i_pins
802 &gpio127i_pins
803 &gpio136i_pins
804 &gpio137oh_pins
805 &gpio138i_pins
806 &gpio139i_pins
807 &gpio140i_pins
808 &gpio141i_pins
809 &gpio190oh_pins
810 &gpio191oh_pins
811 &gpio195ol_pins
812 &gpio196ol_pins
813 &gpio199i_pins
814 &gpio202ol_pins
815 >;
816};
817
818&gcr {
819 serial_port_mux: mux-controller {
820 compatible = "mmio-mux";
821 #mux-control-cells = <1>;
822
823 mux-reg-masks = <0x38 0x07>;
824 idle-states = <2>;
825 };
826};