src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2012 Altera Corporation <www.altera.com>
 */

#include "socfpga_cyclone5.dtsi"

/ {
	model = "Altera SOCFPGA Cyclone V SoC Development Kit";
	compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";

	chosen {
		bootargs = "earlyprintk";
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1GB */
	};

	aliases {
		/* this allow the ethaddr uboot environmnet variable contents
		 * to be added to the gmac1 device tree blob.
		 */
		ethernet0 = &gmac1;
	};

	leds {
		compatible = "gpio-leds";
		led-hps0 {
			label = "hps_led0";
			gpios = <&portb 15 1>;
		};

		led-hps1 {
			label = "hps_led1";
			gpios = <&portb 14 1>;
		};

		led-hps2 {
			label = "hps_led2";
			gpios = <&portb 13 1>;
		};

		led-hps3 {
			label = "hps_led3";
			gpios = <&portb 12 1>;
		};
	};

	regulator_3_3v: regulator {
		compatible = "regulator-fixed";
		regulator-name = "3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&can0 {
	status = "okay";
};

&gmac1 {
	status = "okay";
	phy-mode = "rgmii";

	rxd0-skew-ps = <0>;
	rxd1-skew-ps = <0>;
	rxd2-skew-ps = <0>;
	rxd3-skew-ps = <0>;
	txen-skew-ps = <0>;
	txc-skew-ps = <2600>;
	rxdv-skew-ps = <0>;
	rxc-skew-ps = <2000>;
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&i2c0 {
	status = "okay";
	clock-frequency = <100000>;

	/*
	 * adjust the falling times to decrease the i2c frequency to 50Khz
	 * because the LCD module does not work at the standard 100Khz
	 */
	i2c-sda-falling-time-ns = <5000>;
	i2c-scl-falling-time-ns = <5000>;

	eeprom@51 {
		compatible = "atmel,24c32";
		reg = <0x51>;
		pagesize = <32>;
	};

	rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
	};
};

&mmc0 {
	cd-gpios = <&portb 18 0>;
	vmmc-supply = <&regulator_3_3v>;
	vqmmc-supply = <&regulator_3_3v>;
	status = "okay";
};

&qspi {
	status = "okay";

	flash0: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,mt25qu02g", "jedec,spi-nor";
		reg = <0>;	/* chip select */
		spi-max-frequency = <100000000>;

		m25p,fast-read;
		cdns,page-size = <256>;
		cdns,block-size = <16>;
		cdns,read-delay = <4>;
		cdns,tshsl-ns = <50>;
		cdns,tsd2d-ns = <50>;
		cdns,tchsh-ns = <4>;
		cdns,tslch-ns = <4>;

		partition@qspi-boot {
			/* 8MB for raw data. */
			label = "Flash 0 Raw Data";
			reg = <0x0 0x800000>;
		};

		partition@qspi-rootfs {
			/* 120MB for jffs2 data. */
			label = "Flash 0 jffs2 Filesystem";
			reg = <0x800000 0x7800000>;
		};
	};
};

&spi0 {
	status = "okay";

	spidev@0 {
		compatible = "rohm,dh2228fv";
		reg = <0>;
		spi-max-frequency = <1000000>;
	};
};

&usb1 {
	status = "okay";
};