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Tom Rini53633a82024-02-29 12:33:36 -05001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * This header provides constants for binding nvidia,tegra186-hsp.
4 */
5
6#ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
7#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
8
9/*
10 * These define the type of mailbox that is to be used (doorbell, shared
11 * mailbox, shared semaphore or arbitrated semaphore).
12 */
13#define TEGRA_HSP_MBOX_TYPE_DB 0x0
14#define TEGRA_HSP_MBOX_TYPE_SM 0x1
15#define TEGRA_HSP_MBOX_TYPE_SS 0x2
16#define TEGRA_HSP_MBOX_TYPE_AS 0x3
17
18/*
19 * These define the types of shared mailbox supported based on data size.
20 */
21#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8)
22
23/*
24 * These defines represent the bit associated with the given master ID in the
25 * doorbell registers.
26 */
27#define TEGRA_HSP_DB_MASTER_CCPLEX 17
28#define TEGRA_HSP_DB_MASTER_BPMP 19
29
30/*
31 * Shared mailboxes are unidirectional, so the direction needs to be specified
32 * in the device tree.
33 */
34#define TEGRA_HSP_SM_MASK 0x00ffffff
35#define TEGRA_HSP_SM_FLAG_RX (0 << 31)
36#define TEGRA_HSP_SM_FLAG_TX (1 << 31)
37
38#define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK))
39#define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK))
40
41#endif