blob: 1437ff8a122f2be0ceccc8c4c9c8fa59b38a2f8b [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/intel,keembay-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Intel Keem Bay SoC non-secure Watchdog Timer
8
9maintainers:
10 - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
11
12properties:
13 compatible:
14 enum:
15 - intel,keembay-wdt
16
17 reg:
18 maxItems: 1
19
20 clocks:
21 maxItems: 1
22
23 interrupts:
24 items:
25 - description: interrupt specifier for threshold interrupt line
26 - description: interrupt specifier for timeout interrupt line
27
28 interrupt-names:
29 items:
30 - const: threshold
31 - const: timeout
32
33required:
34 - compatible
35 - reg
36 - interrupts
37 - interrupt-names
38 - clocks
39
40additionalProperties: false
41
42examples:
43 - |
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #define KEEM_BAY_A53_TIM
47
48 watchdog: watchdog@2033009c {
49 compatible = "intel,keembay-wdt";
50 reg = <0x2033009c 0x10>;
51 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
52 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
53 interrupt-names = "threshold", "timeout";
54 clocks = <&scmi_clk KEEM_BAY_A53_TIM>;
55 };
56
57...