| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm SM8550 Peripheral Authentication Service |
| 8 | |
| 9 | maintainers: |
| 10 | - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 11 | |
| 12 | description: |
| 13 | Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware |
| 14 | on the Qualcomm DSP Hexagon cores. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - qcom,sm8550-adsp-pas |
| 20 | - qcom,sm8550-cdsp-pas |
| 21 | - qcom,sm8550-mpss-pas |
| 22 | |
| 23 | reg: |
| 24 | maxItems: 1 |
| 25 | |
| 26 | clocks: |
| 27 | items: |
| 28 | - description: XO clock |
| 29 | |
| 30 | clock-names: |
| 31 | items: |
| 32 | - const: xo |
| 33 | |
| 34 | qcom,qmp: |
| 35 | $ref: /schemas/types.yaml#/definitions/phandle |
| 36 | description: Reference to the AOSS side-channel message RAM. |
| 37 | |
| 38 | smd-edge: false |
| 39 | |
| 40 | firmware-name: |
| 41 | $ref: /schemas/types.yaml#/definitions/string-array |
| 42 | items: |
| 43 | - description: Firmware name of the Hexagon core |
| 44 | - description: Firmware name of the Hexagon Devicetree |
| 45 | |
| 46 | memory-region: |
| 47 | minItems: 2 |
| 48 | items: |
| 49 | - description: Memory region for main Firmware authentication |
| 50 | - description: Memory region for Devicetree Firmware authentication |
| 51 | - description: DSM Memory region |
| 52 | |
| 53 | required: |
| 54 | - compatible |
| 55 | - reg |
| 56 | - memory-region |
| 57 | |
| 58 | allOf: |
| 59 | - $ref: /schemas/remoteproc/qcom,pas-common.yaml# |
| 60 | - if: |
| 61 | properties: |
| 62 | compatible: |
| 63 | enum: |
| 64 | - qcom,sm8550-adsp-pas |
| 65 | - qcom,sm8550-cdsp-pas |
| 66 | then: |
| 67 | properties: |
| 68 | interrupts: |
| 69 | maxItems: 5 |
| 70 | interrupt-names: |
| 71 | maxItems: 5 |
| 72 | memory-region: |
| 73 | maxItems: 2 |
| 74 | else: |
| 75 | properties: |
| 76 | interrupts: |
| 77 | minItems: 6 |
| 78 | interrupt-names: |
| 79 | minItems: 6 |
| 80 | memory-region: |
| 81 | minItems: 3 |
| 82 | |
| 83 | - if: |
| 84 | properties: |
| 85 | compatible: |
| 86 | enum: |
| 87 | - qcom,sm8550-adsp-pas |
| 88 | then: |
| 89 | properties: |
| 90 | power-domains: |
| 91 | items: |
| 92 | - description: LCX power domain |
| 93 | - description: LMX power domain |
| 94 | power-domain-names: |
| 95 | items: |
| 96 | - const: lcx |
| 97 | - const: lmx |
| 98 | |
| 99 | - if: |
| 100 | properties: |
| 101 | compatible: |
| 102 | enum: |
| 103 | - qcom,sm8550-mpss-pas |
| 104 | then: |
| 105 | properties: |
| 106 | power-domains: |
| 107 | items: |
| 108 | - description: CX power domain |
| 109 | - description: MSS power domain |
| 110 | power-domain-names: |
| 111 | items: |
| 112 | - const: cx |
| 113 | - const: mss |
| 114 | - if: |
| 115 | properties: |
| 116 | compatible: |
| 117 | enum: |
| 118 | - qcom,sm8550-cdsp-pas |
| 119 | then: |
| 120 | properties: |
| 121 | power-domains: |
| 122 | items: |
| 123 | - description: CX power domain |
| 124 | - description: MXC power domain |
| 125 | - description: NSP power domain |
| 126 | power-domain-names: |
| 127 | items: |
| 128 | - const: cx |
| 129 | - const: mxc |
| 130 | - const: nsp |
| 131 | |
| 132 | unevaluatedProperties: false |
| 133 | |
| 134 | examples: |
| 135 | - | |
| 136 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 137 | #include <dt-bindings/interrupt-controller/irq.h> |
| 138 | #include <dt-bindings/mailbox/qcom-ipcc.h> |
| 139 | |
| 140 | remoteproc@30000000 { |
| 141 | compatible = "qcom,sm8550-adsp-pas"; |
| 142 | reg = <0x030000000 0x100>; |
| 143 | |
| 144 | clocks = <&rpmhcc RPMH_CXO_CLK>; |
| 145 | clock-names = "xo"; |
| 146 | |
| 147 | interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, |
| 148 | <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, |
| 149 | <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, |
| 150 | <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, |
| 151 | <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; |
| 152 | interrupt-names = "wdog", "fatal", "ready", |
| 153 | "handover", "stop-ack"; |
| 154 | |
| 155 | memory-region = <&adsp_mem>, <&dtb_adsp_mem>; |
| 156 | |
| 157 | firmware-name = "qcom/sm8550/adsp.mbn", |
| 158 | "qcom/sm8550/adsp_dtb.mbn"; |
| 159 | |
| 160 | power-domains = <&rpmhpd_sm8550_lcx>, |
| 161 | <&rpmhpd_sm8550_lmx>; |
| 162 | power-domain-names = "lcx", "lmx"; |
| 163 | |
| 164 | qcom,qmp = <&aoss_qmp>; |
| 165 | qcom,smem-states = <&smp2p_adsp_out 0>; |
| 166 | qcom,smem-state-names = "stop"; |
| 167 | |
| 168 | glink-edge { |
| 169 | interrupts-extended = <&ipcc IPCC_CLIENT_LPASS |
| 170 | IPCC_MPROC_SIGNAL_GLINK_QMP |
| 171 | IRQ_TYPE_EDGE_RISING>; |
| 172 | mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; |
| 173 | |
| 174 | label = "lpass"; |
| 175 | qcom,remote-pid = <2>; |
| 176 | |
| 177 | /* ... */ |
| 178 | }; |
| 179 | }; |