Blame - Bindings/power/fsl,imx-gpcv2.yaml - filogic/uboot

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Tom Rini	53633a8	2024-02-29 12:33:36 -0500	[diff] [blame^]	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
				2	%YAML 1.2
				3	---
				4	$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
				5	$schema: http://devicetree.org/meta-schemas/core.yaml#
				6
				7	title: Freescale i.MX General Power Controller v2
				8
				9	maintainers:
				10	- Andrey Smirnov <andrew.smirnov@gmail.com>
				11
				12	description: \|
				13	The i.MX7S/D General Power Control (GPC) block contains Power Gating
				14	Control (PGC) for various power domains.
				15
				16	Power domains contained within GPC node are generic power domain
				17	providers, documented in
				18	Documentation/devicetree/bindings/power/power-domain.yaml, which are
				19	described as subnodes of the power gating controller 'pgc' node.
				20
				21	IP cores belonging to a power domain should contain a 'power-domains'
				22	property that is a phandle for PGC node representing the domain.
				23
				24	properties:
				25	compatible:
				26	enum:
				27	- fsl,imx7d-gpc
				28	- fsl,imx8mn-gpc
				29	- fsl,imx8mq-gpc
				30	- fsl,imx8mm-gpc
				31	- fsl,imx8mp-gpc
				32
				33	reg:
				34	maxItems: 1
				35
				36	interrupts:
				37	maxItems: 1
				38
				39	interrupt-controller: true
				40	'#interrupt-cells':
				41	const: 3
				42
				43	pgc:
				44	type: object
				45	additionalProperties: false
				46	description: list of power domains provided by this controller.
				47
				48	properties:
				49	'#address-cells':
				50	const: 1
				51
				52	'#size-cells':
				53	const: 0
				54
				55	patternProperties:
				56	"power-domain@[0-9a-f]+$":
				57	type: object
				58	additionalProperties: false
				59
				60	properties:
				61
				62	'#power-domain-cells':
				63	const: 0
				64
				65	reg:
				66	description: \|
				67	Power domain index. Valid values are defined in
				68	include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
				69	include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
				70	include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
				71	include/dt-bindings/power/imx8mp-power.h for fsl,imx8mp-gpc
				72	maxItems: 1
				73
				74	clocks:
				75	description: \|
				76	A number of phandles to clocks that need to be enabled during domain
				77	power-up sequencing to ensure reset propagation into devices located
				78	inside this power domain.
				79	minItems: 1
				80	maxItems: 5
				81
				82	power-supply: true
				83
				84	power-domains:
				85	maxItems: 1
				86
				87	resets:
				88	description: \|
				89	A number of phandles to resets that need to be asserted during
				90	power-up sequencing of the domain. The resets belong to devices
				91	located inside the power domain, which need to be held in reset
				92	across the power-up sequence. So no means to specify what each
				93	reset is in a generic power-domain binding.
				94	minItems: 1
				95	maxItems: 4
				96
				97	required:
				98	- '#power-domain-cells'
				99	- reg
				100
				101	required:
				102	- '#address-cells'
				103	- '#size-cells'
				104
				105	required:
				106	- compatible
				107	- reg
				108	- interrupts
				109	- pgc
				110
				111	additionalProperties: false
				112
				113	examples:
				114	- \|
				115	#include <dt-bindings/interrupt-controller/arm-gic.h>
				116
				117	gpc@303a0000 {
				118	compatible = "fsl,imx7d-gpc";
				119	reg = <0x303a0000 0x1000>;
				120	interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
				121
				122	pgc {
				123	#address-cells = <1>;
				124	#size-cells = <0>;
				125
				126	pgc_mipi_phy: power-domain@0 {
				127	#power-domain-cells = <0>;
				128	reg = <0>;
				129	power-supply = <&reg_1p0d>;
				130	};
				131
				132	pgc_pcie_phy: power-domain@1 {
				133	#power-domain-cells = <0>;
				134	reg = <1>;
				135	power-supply = <&reg_1p0d>;
				136	};
				137
				138	pgc_hsic_phy: power-domain@2 {
				139	#power-domain-cells = <0>;
				140	reg = <2>;
				141	power-supply = <&reg_1p2>;
				142	};
				143	};
				144	};