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git01.mediatek.com / filogic / uboot / 53633a893a06bd5a0c807287d9cc29337806eaf7 / . / Bindings / pinctrl / qcom,msm8998-pinctrl.yaml
blob: bd6d7caf499afb6e1c3026d81c3e69f22285bc99 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame^]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8998 TLMM pin controller
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
12
13description:
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC.
15
16properties:
17 compatible:
18 const: qcom,msm8998-pinctrl
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 interrupt-controller: true
27 "#interrupt-cells": true
28 gpio-controller: true
29 "#gpio-cells": true
30 gpio-ranges: true
31 wakeup-parent: true
32
33 gpio-reserved-ranges:
34 minItems: 1
35 maxItems: 75
36
37 gpio-line-names:
38 maxItems: 150
39
40patternProperties:
41 "-state$":
42 oneOf:
43 - $ref: "#/$defs/qcom-msm8998-tlmm-state"
44 - patternProperties:
45 "-pins$":
46 $ref: "#/$defs/qcom-msm8998-tlmm-state"
47 additionalProperties: false
48
49$defs:
50 qcom-msm8998-tlmm-state:
51 type: object
52 description:
53 Pinctrl node's client devices use subnodes for desired pin configuration.
54 Client device subnodes use below standard properties.
55 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
56 unevaluatedProperties: false
57
58 properties:
59 pins:
60 description:
61 List of gpio pins affected by the properties specified in this
62 subnode.
63 items:
64 oneOf:
65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
66 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
67 minItems: 1
68 maxItems: 36
69
70 function:
71 description:
72 Specify the alternative function to be configured for the specified
73 pins.
74
75 enum: [ gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0,
76 atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1,
77 atest_usb10, atest_usb11, atest_usb12, atest_usb13, audio_ref,
78 bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a, blsp10_spi_b,
79 blsp11_i2c, blsp1_spi, blsp1_spi_a, blsp1_spi_b, blsp2_spi,
80 blsp9_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,
81 blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9,
82 blsp_i2c10, blsp_i2c11, blsp_i2c12, blsp_spi1, blsp_spi2,
83 blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7,
84 blsp_spi8, blsp_spi9, blsp_spi10, blsp_spi11, blsp_spi12,
85 blsp_uart1_a, blsp_uart1_b, blsp_uart2_a, blsp_uart2_b,
86 blsp_uart3_a, blsp_uart3_b, blsp_uart7_a, blsp_uart7_b,
87 blsp_uart8, blsp_uart8_a, blsp_uart8_b, blsp_uart9_a,
88 blsp_uart9_b, blsp_uim1_a, blsp_uim1_b, blsp_uim2_a,
89 blsp_uim2_b, blsp_uim3_a, blsp_uim3_b, blsp_uim7_a,
90 blsp_uim7_b, blsp_uim8_a, blsp_uim8_b, blsp_uim9_a,
91 blsp_uim9_b, bt_reset, btfm_slimbus, cam_mclk, cci_async,
92 cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,
93 cci_timer4, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,
94 edp_hot, edp_lcd, gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b,
95 gcc_gp3_a, gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv,
96 isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus,
97 m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,
98 mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte,
99 nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag,
100 pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc,
101 pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b,
102 qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable, qlink_request,
103 qua_mi2s, sd_card, sd_write, sdc40, sdc41, sdc42, sdc43,
104 sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, spkr_i2s, ssbi1, ssc_irq,
105 ter_mi2s, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2, tsif0,
106 tsif1, uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
107 uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1,
108 vsense_clkout, vsense_data0, vsense_data1, vsense_mode,
109 wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1 ]
110
111 required:
112 - pins
113
114allOf:
115 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
116
117required:
118 - compatible
119 - reg
120
121additionalProperties: false
122
123examples:
124 - |
125 #include <dt-bindings/interrupt-controller/arm-gic.h>
126
127 tlmm: pinctrl@3400000 {
128 compatible = "qcom,msm8998-pinctrl";
129 reg = <0x03400000 0xc00000>;
130 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
131 gpio-ranges = <&tlmm 0 0 150>;
132 gpio-controller;
133 #gpio-cells = <2>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
136 gpio-reserved-ranges = <0 4>, <81 4>;
137
138 sdc2-off-state {
139 clk-pins {
140 pins = "sdc2_clk";
141 drive-strength = <2>;
142 bias-disable;
143 };
144
145 cmd-pins {
146 pins = "sdc2_cmd";
147 drive-strength = <2>;
148 bias-pull-up;
149 };
150
151 data-pins {
152 pins = "sdc2_data";
153 drive-strength = <2>;
154 bias-pull-up;
155 };
156 };
157
158 sdc2-cd-state {
159 pins = "gpio95";
160 function = "gpio";
161 bias-pull-up;
162 drive-strength = <2>;
163 };
164 };