| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm MSM8976 TLMM pin controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Bjorn Andersson <andersson@kernel.org> |
| 11 | - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
| 12 | |
| 13 | description: |
| 14 | Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | const: qcom,msm8976-pinctrl |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | interrupts: |
| 24 | maxItems: 1 |
| 25 | |
| 26 | interrupt-controller: true |
| 27 | "#interrupt-cells": true |
| 28 | gpio-controller: true |
| 29 | "#gpio-cells": true |
| 30 | gpio-ranges: true |
| 31 | wakeup-parent: true |
| 32 | |
| 33 | gpio-reserved-ranges: |
| 34 | minItems: 1 |
| 35 | maxItems: 73 |
| 36 | |
| 37 | gpio-line-names: |
| 38 | maxItems: 145 |
| 39 | |
| 40 | patternProperties: |
| 41 | "-state$": |
| 42 | oneOf: |
| 43 | - $ref: "#/$defs/qcom-msm8976-tlmm-state" |
| 44 | - patternProperties: |
| 45 | "-pins$": |
| 46 | $ref: "#/$defs/qcom-msm8976-tlmm-state" |
| 47 | additionalProperties: false |
| 48 | |
| 49 | $defs: |
| 50 | qcom-msm8976-tlmm-state: |
| 51 | type: object |
| 52 | description: |
| 53 | Desired pin configuration for a device or its specific state (like sleep |
| 54 | or active). |
| 55 | $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state |
| 56 | unevaluatedProperties: false |
| 57 | |
| 58 | properties: |
| 59 | pins: |
| 60 | description: |
| 61 | List of gpio pins affected by the properties specified in this state. |
| 62 | items: |
| 63 | oneOf: |
| 64 | - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$" |
| 65 | - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2, |
| 66 | qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, |
| 67 | sdc2_clk, sdc2_cmd, sdc2_data ] |
| 68 | minItems: 1 |
| 69 | maxItems: 36 |
| 70 | |
| 71 | function: |
| 72 | description: |
| 73 | Specify the alternative function to be configured for the specified |
| 74 | pins. |
| 75 | |
| 76 | enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2, |
| 77 | blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3, |
| 78 | qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b, |
| 79 | blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5, |
| 80 | qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a, |
| 81 | qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b, |
| 82 | blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a, |
| 83 | sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi, |
| 84 | blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a, |
| 85 | uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset, |
| 86 | uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present, |
| 87 | ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample, |
| 88 | sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter, |
| 89 | pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus, |
| 90 | lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2, |
| 91 | wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan, |
| 92 | wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down, |
| 93 | dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8, |
| 94 | wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1, |
| 95 | gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ] |
| 96 | |
| 97 | required: |
| 98 | - pins |
| 99 | |
| 100 | allOf: |
| 101 | - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# |
| 102 | |
| 103 | required: |
| 104 | - compatible |
| 105 | - reg |
| 106 | |
| 107 | additionalProperties: false |
| 108 | |
| 109 | examples: |
| 110 | - | |
| 111 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 112 | |
| 113 | tlmm: pinctrl@1000000 { |
| 114 | compatible = "qcom,msm8976-pinctrl"; |
| 115 | reg = <0x1000000 0x300000>; |
| 116 | #gpio-cells = <2>; |
| 117 | gpio-controller; |
| 118 | gpio-ranges = <&tlmm 0 0 145>; |
| 119 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; |
| 120 | interrupt-controller; |
| 121 | #interrupt-cells = <2>; |
| 122 | |
| 123 | blsp1-uart2-active-state { |
| 124 | pins = "gpio4", "gpio5", "gpio6", "gpio7"; |
| 125 | function = "blsp_uart2"; |
| 126 | drive-strength = <2>; |
| 127 | bias-disable; |
| 128 | }; |
| 129 | }; |