Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: Qualcomm eDP PHY |
| 9 | |
| 10 | maintainers: |
| 11 | - Bjorn Andersson <bjorn.andersson@linaro.org> |
| 12 | |
| 13 | description: |
| 14 | The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides |
| 15 | the physical interface for Embedded Display Port. |
| 16 | |
| 17 | properties: |
| 18 | compatible: |
| 19 | enum: |
| 20 | - qcom,sc7280-edp-phy |
| 21 | - qcom,sc8180x-edp-phy |
| 22 | - qcom,sc8280xp-dp-phy |
| 23 | - qcom,sc8280xp-edp-phy |
| 24 | |
| 25 | reg: |
| 26 | items: |
| 27 | - description: PHY base register block |
| 28 | - description: tx0 register block |
| 29 | - description: tx1 register block |
| 30 | - description: PLL register block |
| 31 | |
| 32 | clocks: |
| 33 | maxItems: 2 |
| 34 | |
| 35 | clock-names: |
| 36 | items: |
| 37 | - const: aux |
| 38 | - const: cfg_ahb |
| 39 | |
| 40 | "#clock-cells": |
| 41 | const: 1 |
| 42 | |
| 43 | "#phy-cells": |
| 44 | const: 0 |
| 45 | |
| 46 | power-domains: |
| 47 | maxItems: 1 |
| 48 | |
| 49 | vdda-phy-supply: true |
| 50 | vdda-pll-supply: true |
| 51 | |
| 52 | required: |
| 53 | - compatible |
| 54 | - reg |
| 55 | - clocks |
| 56 | - clock-names |
| 57 | - "#clock-cells" |
| 58 | - "#phy-cells" |
| 59 | |
| 60 | additionalProperties: false |
| 61 | |
| 62 | examples: |
| 63 | - | |
| 64 | phy@aec2a00 { |
| 65 | compatible = "qcom,sc8180x-edp-phy"; |
| 66 | reg = <0x0aec2a00 0x1c0>, |
| 67 | <0x0aec2200 0xa0>, |
| 68 | <0x0aec2600 0xa0>, |
| 69 | <0x0aec2000 0x19c>; |
| 70 | |
| 71 | clocks = <&dispcc 0>, <&dispcc 1>; |
| 72 | clock-names = "aux", "cfg_ahb"; |
| 73 | |
| 74 | #clock-cells = <1>; |
| 75 | #phy-cells = <0>; |
| 76 | |
| 77 | vdda-phy-supply = <&vdd_a_edp_0_1p2>; |
| 78 | vdda-pll-supply = <&vdd_a_edp_0_0p9>; |
| 79 | }; |
| 80 | ... |