Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | Micrel PHY properties. |
| 2 | |
| 3 | These properties cover the base properties Micrel PHYs. |
| 4 | |
| 5 | Optional properties: |
| 6 | |
| 7 | - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs. |
| 8 | |
| 9 | Configure the LED mode with single value. The list of PHYs and the |
| 10 | bits that are currently supported: |
| 11 | |
| 12 | KSZ8001: register 0x1e, bits 15..14 |
| 13 | KSZ8041: register 0x1e, bits 15..14 |
| 14 | KSZ8021: register 0x1f, bits 5..4 |
| 15 | KSZ8031: register 0x1f, bits 5..4 |
| 16 | KSZ8051: register 0x1f, bits 5..4 |
| 17 | KSZ8081: register 0x1f, bits 5..4 |
| 18 | KSZ8091: register 0x1f, bits 5..4 |
| 19 | LAN8814: register EP5.0, bit 6 |
| 20 | |
| 21 | See the respective PHY datasheet for the mode values. |
| 22 | |
| 23 | - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select |
| 24 | bit selects 25 MHz mode |
| 25 | |
| 26 | Setting the RMII Reference Clock Select bit enables 25 MHz rather |
| 27 | than 50 MHz clock mode. |
| 28 | |
| 29 | Note that this option in only needed for certain PHY revisions with a |
| 30 | non-standard, inverted function of this configuration bit. |
| 31 | Specifically, a clock reference ("rmii-ref" below) is always needed to |
| 32 | actually select a mode. |
| 33 | |
| 34 | - clocks, clock-names: contains clocks according to the common clock bindings. |
| 35 | |
| 36 | supported clocks: |
| 37 | - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference |
| 38 | input clock. Used to determine the XI input clock. |
| 39 | |
| 40 | - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode |
| 41 | |
| 42 | Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled |
| 43 | by the FXEN boot strapping pin. It can't be determined from the PHY |
| 44 | registers whether the PHY is in fiber mode, so this boolean device tree |
| 45 | property can be used to describe it. |
| 46 | |
| 47 | In fiber mode, auto-negotiation is disabled and the PHY can only work in |
| 48 | 100base-fx (full and half duplex) modes. |
| 49 | |
| 50 | - coma-mode-gpios: If present the given gpio will be deasserted when the |
| 51 | PHY is probed. |
| 52 | |
| 53 | Some PHYs have a COMA mode input pin which puts the PHY into |
| 54 | isolate and power-down mode. On some boards this input is connected |
| 55 | to a GPIO of the SoC. |
| 56 | |
| 57 | Supported on the LAN8814. |