| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | Lantiq XWAY SoC FPI BUS binding |
| 2 | ============================ |
| 3 | |
| 4 | |
| 5 | ------------------------------------------------------------------------------- |
| 6 | Required properties: |
| 7 | - compatible : Should be one of |
| 8 | "lantiq,xrx200-fpi" |
| 9 | - reg : The address and length of the XBAR |
| 10 | configuration register. |
| 11 | Address and length of the FPI bus itself. |
| 12 | - lantiq,rcu : A phandle to the RCU syscon |
| 13 | - lantiq,offset-endianness : Offset of the endianness configuration |
| 14 | register |
| 15 | |
| 16 | ------------------------------------------------------------------------------- |
| 17 | Example for the FPI on the xrx200 SoCs: |
| 18 | fpi@10000000 { |
| 19 | compatible = "lantiq,xrx200-fpi"; |
| 20 | ranges = <0x0 0x10000000 0xf000000>; |
| 21 | reg = <0x1f400000 0x1000>, |
| 22 | <0x10000000 0xf000000>; |
| 23 | lantiq,rcu = <&rcu0>; |
| 24 | lantiq,offset-endianness = <0x4c>; |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <1>; |
| 27 | |
| 28 | gptu@e100a00 { |
| 29 | ...... |
| 30 | }; |
| 31 | }; |