Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: i.MX8 Image Sensing Interface |
| 8 | |
| 9 | maintainers: |
| 10 | - Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 11 | |
| 12 | description: | |
| 13 | The Image Sensing Interface (ISI) combines image processing pipelines with |
| 14 | DMA engines to process and capture frames originating from a variety of |
| 15 | sources. The inputs to the ISI go through Pixel Link interfaces, and their |
| 16 | number and nature is SoC-dependent. They cover both capture interfaces (MIPI |
| 17 | CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support. |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | enum: |
| 22 | - fsl,imx8mn-isi |
| 23 | - fsl,imx8mp-isi |
| 24 | - fsl,imx93-isi |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | clocks: |
| 30 | items: |
| 31 | - description: The AXI clock |
| 32 | - description: The APB clock |
| 33 | # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified |
| 34 | # as well, in case some SoCs have the ability to control them separately. |
| 35 | # This may be the case of the i.MX8[DQ]X(P) |
| 36 | |
| 37 | clock-names: |
| 38 | items: |
| 39 | - const: axi |
| 40 | - const: apb |
| 41 | |
| 42 | fsl,blk-ctrl: |
| 43 | $ref: /schemas/types.yaml#/definitions/phandle |
| 44 | description: |
| 45 | A phandle referencing the block control that contains the CSIS to ISI |
| 46 | gasket. |
| 47 | |
| 48 | interrupts: |
| 49 | description: Processing pipeline interrupts, one per pipeline |
| 50 | minItems: 1 |
| 51 | maxItems: 2 |
| 52 | |
| 53 | power-domains: |
| 54 | maxItems: 1 |
| 55 | |
| 56 | ports: |
| 57 | $ref: /schemas/graph.yaml#/properties/ports |
| 58 | description: | |
| 59 | Ports represent the Pixel Link inputs to the ISI. Their number and |
| 60 | assignment are model-dependent. Each port shall have a single endpoint. |
| 61 | |
| 62 | required: |
| 63 | - compatible |
| 64 | - reg |
| 65 | - interrupts |
| 66 | - clocks |
| 67 | - clock-names |
| 68 | - fsl,blk-ctrl |
| 69 | - ports |
| 70 | |
| 71 | allOf: |
| 72 | - if: |
| 73 | properties: |
| 74 | compatible: |
| 75 | contains: |
| 76 | enum: |
| 77 | - fsl,imx8mn-isi |
| 78 | - fsl,imx93-isi |
| 79 | then: |
| 80 | properties: |
| 81 | interrupts: |
| 82 | maxItems: 1 |
| 83 | ports: |
| 84 | properties: |
| 85 | port@0: |
| 86 | description: MIPI CSI-2 RX |
| 87 | required: |
| 88 | - port@0 |
| 89 | |
| 90 | - if: |
| 91 | properties: |
| 92 | compatible: |
| 93 | contains: |
| 94 | const: fsl,imx8mp-isi |
| 95 | then: |
| 96 | properties: |
| 97 | interrupts: |
| 98 | maxItems: 2 |
| 99 | ports: |
| 100 | properties: |
| 101 | port@0: |
| 102 | description: MIPI CSI-2 RX 0 |
| 103 | port@1: |
| 104 | description: MIPI CSI-2 RX 1 |
| 105 | required: |
| 106 | - port@0 |
| 107 | - port@1 |
| 108 | |
| 109 | additionalProperties: false |
| 110 | |
| 111 | examples: |
| 112 | - | |
| 113 | #include <dt-bindings/clock/imx8mn-clock.h> |
| 114 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 115 | #include <dt-bindings/interrupt-controller/irq.h> |
| 116 | #include <dt-bindings/power/imx8mn-power.h> |
| 117 | |
| 118 | isi@32e20000 { |
| 119 | compatible = "fsl,imx8mn-isi"; |
| 120 | reg = <0x32e20000 0x100>; |
| 121 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 122 | clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>, |
| 123 | <&clk IMX8MN_CLK_DISP_APB_ROOT>; |
| 124 | clock-names = "axi", "apb"; |
| 125 | fsl,blk-ctrl = <&disp_blk_ctrl>; |
| 126 | power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>; |
| 127 | |
| 128 | ports { |
| 129 | #address-cells = <1>; |
| 130 | #size-cells = <0>; |
| 131 | |
| 132 | port@0 { |
| 133 | reg = <0>; |
| 134 | isi_in: endpoint { |
| 135 | remote-endpoint = <&mipi_csi_out>; |
| 136 | }; |
| 137 | }; |
| 138 | }; |
| 139 | }; |
| 140 | |
| 141 | - | |
| 142 | #include <dt-bindings/clock/imx8mp-clock.h> |
| 143 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 144 | #include <dt-bindings/interrupt-controller/irq.h> |
| 145 | |
| 146 | isi@32e00000 { |
| 147 | compatible = "fsl,imx8mp-isi"; |
| 148 | reg = <0x32e00000 0x4000>; |
| 149 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, |
| 150 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
| 151 | clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, |
| 152 | <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; |
| 153 | clock-names = "axi", "apb"; |
| 154 | fsl,blk-ctrl = <&media_blk_ctrl>; |
| 155 | power-domains = <&mediamix_pd>; |
| 156 | |
| 157 | ports { |
| 158 | #address-cells = <1>; |
| 159 | #size-cells = <0>; |
| 160 | |
| 161 | port@0 { |
| 162 | reg = <0>; |
| 163 | isi_in_0: endpoint { |
| 164 | remote-endpoint = <&mipi_csi_0_out>; |
| 165 | }; |
| 166 | }; |
| 167 | |
| 168 | port@1 { |
| 169 | reg = <1>; |
| 170 | isi_in_1: endpoint { |
| 171 | remote-endpoint = <&mipi_csi_1_out>; |
| 172 | }; |
| 173 | }; |
| 174 | }; |
| 175 | }; |
| 176 | ... |