Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Conor Dooley <conor.dooley@microchip.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | const: microchip,mpfs-mailbox |
| 15 | |
| 16 | reg: |
| 17 | oneOf: |
| 18 | - items: |
| 19 | - description: mailbox control & data registers |
| 20 | - description: mailbox interrupt registers |
| 21 | deprecated: true |
| 22 | - items: |
| 23 | - description: mailbox control registers |
| 24 | - description: mailbox interrupt registers |
| 25 | - description: mailbox data registers |
| 26 | |
| 27 | interrupts: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | "#mbox-cells": |
| 31 | const: 1 |
| 32 | |
| 33 | required: |
| 34 | - compatible |
| 35 | - reg |
| 36 | - interrupts |
| 37 | - "#mbox-cells" |
| 38 | |
| 39 | additionalProperties: false |
| 40 | |
| 41 | examples: |
| 42 | - | |
| 43 | soc { |
| 44 | #address-cells = <2>; |
| 45 | #size-cells = <2>; |
| 46 | mbox: mailbox@37020000 { |
| 47 | compatible = "microchip,mpfs-mailbox"; |
| 48 | reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, |
| 49 | <0x0 0x37020800 0x0 0x100>; |
| 50 | interrupt-parent = <&L1>; |
| 51 | interrupts = <96>; |
| 52 | #mbox-cells = <1>; |
| 53 | }; |
| 54 | }; |