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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iommu/apple,dart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple DART IOMMU
8
9maintainers:
10 - Sven Peter <sven@svenpeter.dev>
11
12description: |+
13 Apple SoCs may contain an implementation of their Device Address
14 Resolution Table which provides a mandatory layer of address
15 translations for various masters.
16
17 Each DART instance is capable of handling up to 16 different streams
18 with individual pagetables and page-level read/write protection flags.
19
20 This DART IOMMU also raises interrupts in response to various
21 fault conditions.
22
23properties:
24 compatible:
25 enum:
26 - apple,t8103-dart
27 - apple,t8110-dart
28 - apple,t6000-dart
29
30 reg:
31 maxItems: 1
32
33 interrupts:
34 maxItems: 1
35
36 clocks:
37 description:
38 Reference to the gate clock phandle if required for this IOMMU.
39 Optional since not all IOMMUs are attached to a clock gate.
40
41 '#iommu-cells':
42 const: 1
43 description:
44 Has to be one. The single cell describes the stream id emitted by
45 a master to the IOMMU.
46
47 power-domains:
48 maxItems: 1
49
50required:
51 - compatible
52 - reg
53 - '#iommu-cells'
54 - interrupts
55
56additionalProperties: false
57
58examples:
59 - |+
60 dart1: iommu@82f80000 {
61 compatible = "apple,t8103-dart";
62 reg = <0x82f80000 0x4000>;
63 interrupts = <1 781 4>;
64 #iommu-cells = <1>;
65 };
66
67 master1 {
68 iommus = <&dart1 0>;
69 };
70
71 - |+
72 dart2a: iommu@82f00000 {
73 compatible = "apple,t8103-dart";
74 reg = <0x82f00000 0x4000>;
75 interrupts = <1 781 4>;
76 #iommu-cells = <1>;
77 };
78 dart2b: iommu@82f80000 {
79 compatible = "apple,t8103-dart";
80 reg = <0x82f80000 0x4000>;
81 interrupts = <1 781 4>;
82 #iommu-cells = <1>;
83 };
84
85 master2 {
86 iommus = <&dart2a 0>, <&dart2b 1>;
87 };