| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ADF4377 Microwave Wideband Synthesizer with Integrated VCO |
| 8 | |
| 9 | maintainers: |
| 10 | - Antoniu Miclaus <antoniu.miclaus@analog.com> |
| 11 | - Dragos Bogdan <dragos.bogdan@analog.com> |
| 12 | |
| 13 | description: | |
| 14 | The ADF4377 is a high performance, ultralow jitter, dual output integer-N |
| 15 | phased locked loop (PLL) with integrated voltage controlled oscillator (VCO) |
| 16 | ideally suited for data converter and mixed signal front end (MxFE) clock |
| 17 | applications. |
| 18 | |
| 19 | https://www.analog.com/en/products/adf4377.html |
| 20 | |
| 21 | properties: |
| 22 | compatible: |
| 23 | enum: |
| 24 | - adi,adf4377 |
| 25 | - adi,adf4378 |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | spi-max-frequency: |
| 31 | maximum: 10000000 |
| 32 | |
| 33 | clocks: |
| 34 | maxItems: 1 |
| 35 | |
| 36 | clock-names: |
| 37 | description: |
| 38 | External clock that provides reference input frequency. |
| 39 | items: |
| 40 | - const: ref_in |
| 41 | |
| 42 | chip-enable-gpios: |
| 43 | description: |
| 44 | GPIO that controls the Chip Enable Pin. |
| 45 | maxItems: 1 |
| 46 | |
| 47 | clk1-enable-gpios: |
| 48 | description: |
| 49 | GPIO that controls the Enable Clock 1 Output Buffer Pin. |
| 50 | maxItems: 1 |
| 51 | |
| 52 | clk2-enable-gpios: |
| 53 | description: |
| 54 | GPIO that controls the Enable Clock 2 Output Buffer Pin. |
| 55 | maxItems: 1 |
| 56 | |
| 57 | adi,muxout-select: |
| 58 | description: |
| 59 | On chip multiplexer output selection. |
| 60 | high_z - MUXOUT Pin set to high-Z. |
| 61 | lock_detect - MUXOUT Pin set to lock detector output. |
| 62 | muxout_low - MUXOUT Pin set to low. |
| 63 | f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2. |
| 64 | f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2. |
| 65 | muxout_high - MUXOUT Pin set to high. |
| 66 | enum: [high_z, lock_detect, muxout_low, f_div_rclk_2, f_div_nclk_2, muxout_high] |
| 67 | |
| 68 | required: |
| 69 | - compatible |
| 70 | - reg |
| 71 | - clocks |
| 72 | - clock-names |
| 73 | |
| 74 | allOf: |
| 75 | - $ref: /schemas/spi/spi-peripheral-props.yaml# |
| 76 | |
| 77 | unevaluatedProperties: false |
| 78 | |
| 79 | examples: |
| 80 | - | |
| 81 | spi { |
| 82 | #address-cells = <1>; |
| 83 | #size-cells = <0>; |
| 84 | frequency@0 { |
| 85 | compatible = "adi,adf4377"; |
| 86 | reg = <0>; |
| 87 | spi-max-frequency = <10000000>; |
| 88 | clocks = <&adf4377_ref_in>; |
| 89 | clock-names = "ref_in"; |
| 90 | }; |
| 91 | }; |
| 92 | ... |