| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/i2c/i2c-owl.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Actions Semi Owl I2C Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 11 | |
| 12 | description: | |
| 13 | This I2C controller is found in the Actions Semi Owl SoCs: |
| 14 | S500, S700 and S900. |
| 15 | |
| 16 | allOf: |
| 17 | - $ref: /schemas/i2c/i2c-controller.yaml# |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | enum: |
| 22 | - actions,s500-i2c # Actions Semi S500 compatible SoCs |
| 23 | - actions,s700-i2c # Actions Semi S700 compatible SoCs |
| 24 | - actions,s900-i2c # Actions Semi S900 compatible SoCs |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | interrupts: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | clocks: |
| 33 | description: Phandle of the clock feeding the I2C controller. |
| 34 | minItems: 1 |
| 35 | |
| 36 | clock-frequency: |
| 37 | description: | |
| 38 | Desired I2C bus clock frequency in Hz. As only Standard and Fast |
| 39 | modes are supported, possible values are 100000 and 400000. |
| 40 | enum: [100000, 400000] |
| 41 | |
| 42 | required: |
| 43 | - compatible |
| 44 | - reg |
| 45 | - interrupts |
| 46 | - clocks |
| 47 | |
| 48 | unevaluatedProperties: false |
| 49 | |
| 50 | examples: |
| 51 | - | |
| 52 | #include <dt-bindings/clock/actions,s900-cmu.h> |
| 53 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 54 | i2c@e0170000 { |
| 55 | compatible = "actions,s900-i2c"; |
| 56 | reg = <0xe0170000 0x1000>; |
| 57 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
| 58 | clocks = <&cmu CLK_I2C0>; |
| 59 | clock-frequency = <100000>; |
| 60 | }; |
| 61 | |
| 62 | ... |