Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: PCF857x-compatible I/O expanders |
| 8 | |
| 9 | maintainers: |
| 10 | - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| 11 | |
| 12 | description: |
| 13 | The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be |
| 14 | driven high by a pull-up current source or driven low to ground. This |
| 15 | combines the direction and output level into a single bit per line, which |
| 16 | can't be read back. We can't actually know at initialization time whether a |
| 17 | line is configured (a) as output and driving the signal low/high, or (b) as |
| 18 | input and reporting a low/high value, without knowing the last value written |
| 19 | since the chip came out of reset (if any). The only reliable solution for |
| 20 | setting up line direction is thus to do it explicitly. |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | enum: |
| 25 | - maxim,max7328 |
| 26 | - maxim,max7329 |
| 27 | - nxp,pca8574 |
| 28 | - nxp,pca8575 |
| 29 | - nxp,pca9670 |
| 30 | - nxp,pca9671 |
| 31 | - nxp,pca9672 |
| 32 | - nxp,pca9673 |
| 33 | - nxp,pca9674 |
| 34 | - nxp,pca9675 |
| 35 | - nxp,pcf8574 |
| 36 | - nxp,pcf8574a |
| 37 | - nxp,pcf8575 |
| 38 | |
| 39 | reg: |
| 40 | maxItems: 1 |
| 41 | |
| 42 | gpio-line-names: |
| 43 | minItems: 1 |
| 44 | maxItems: 16 |
| 45 | |
| 46 | gpio-controller: true |
| 47 | |
| 48 | '#gpio-cells': |
| 49 | const: 2 |
| 50 | description: |
| 51 | The first cell is the GPIO number and the second cell specifies GPIO |
| 52 | flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH |
| 53 | and GPIO_ACTIVE_LOW flags are supported. |
| 54 | |
| 55 | lines-initial-states: |
| 56 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 57 | description: |
| 58 | Bitmask that specifies the initial state of each line. |
| 59 | When a bit is set to zero, the corresponding line will be initialized to |
| 60 | the input (pulled-up) state. |
| 61 | When the bit is set to one, the line will be initialized to the |
| 62 | low-level output state. |
| 63 | If the property is not specified all lines will be initialized to the |
| 64 | input state. |
| 65 | |
| 66 | interrupts: |
| 67 | maxItems: 1 |
| 68 | |
| 69 | interrupt-controller: true |
| 70 | |
| 71 | '#interrupt-cells': |
| 72 | const: 2 |
| 73 | |
| 74 | wakeup-source: true |
| 75 | |
| 76 | patternProperties: |
| 77 | "^(.+-hog(-[0-9]+)?)$": |
| 78 | type: object |
| 79 | |
| 80 | required: |
| 81 | - gpio-hog |
| 82 | |
| 83 | required: |
| 84 | - compatible |
| 85 | - reg |
| 86 | - gpio-controller |
| 87 | - '#gpio-cells' |
| 88 | |
| 89 | additionalProperties: false |
| 90 | |
| 91 | examples: |
| 92 | - | |
| 93 | i2c { |
| 94 | #address-cells = <1>; |
| 95 | #size-cells = <0>; |
| 96 | |
| 97 | pcf8575: gpio@20 { |
| 98 | compatible = "nxp,pcf8575"; |
| 99 | reg = <0x20>; |
| 100 | interrupt-parent = <&irqpin2>; |
| 101 | interrupts = <3 0>; |
| 102 | gpio-controller; |
| 103 | #gpio-cells = <2>; |
| 104 | interrupt-controller; |
| 105 | #interrupt-cells = <2>; |
| 106 | }; |
| 107 | }; |