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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/intel,ixp4xx-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Intel IXP4xx XScale Networking Processors GPIO Controller
8
9description: |
10 This GPIO controller is found in the Intel IXP4xx
11 processors. It supports 16 GPIO lines.
12 The interrupt portions of the GPIO controller is hierarchical.
13 The synchronous edge detector is part of the GPIO block, but the
14 actual enabling/disabling of the interrupt line is done in the
15 main IXP4xx interrupt controller which has a 1-to-1 mapping for
16 the first 12 GPIO lines to 12 system interrupts.
17 The remaining 4 GPIO lines can not be used for receiving
18 interrupts.
19 The interrupt parent of this GPIO controller must be the
20 IXP4xx interrupt controller.
21 GPIO 14 and 15 can be used as clock outputs rather than GPIO,
22 and this can be enabled by a special flag.
23
24maintainers:
25 - Linus Walleij <linus.walleij@linaro.org>
26
27properties:
28 compatible:
29 const: intel,ixp4xx-gpio
30
31 reg:
32 maxItems: 1
33
34 gpio-controller: true
35
36 "#gpio-cells":
37 const: 2
38
39 interrupt-controller: true
40
41 "#interrupt-cells":
42 const: 2
43
44 intel,ixp4xx-gpio14-clkout:
45 description: If defined, enables clock output on GPIO 14
46 instead of GPIO.
47 type: boolean
48
49 intel,ixp4xx-gpio15-clkout:
50 description: If defined, enables clock output on GPIO 15
51 instead of GPIO.
52 type: boolean
53
54required:
55 - compatible
56 - reg
57 - "#gpio-cells"
58 - interrupt-controller
59 - "#interrupt-cells"
60
61additionalProperties: false
62
63examples:
64 - |
65 #include <dt-bindings/interrupt-controller/irq.h>
66 gpio@c8004000 {
67 compatible = "intel,ixp4xx-gpio";
68 reg = <0xc8004000 0x1000>;
69 gpio-controller;
70 #gpio-cells = <2>;
71 interrupt-controller;
72 #interrupt-cells = <2>;
73 };