| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm Display DPU on MSM8998 |
| 8 | |
| 9 | maintainers: |
| 10 | - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> |
| 11 | |
| 12 | $ref: /schemas/display/msm/dpu-common.yaml# |
| 13 | |
| 14 | properties: |
| 15 | compatible: |
| 16 | const: qcom,msm8998-dpu |
| 17 | |
| 18 | reg: |
| 19 | items: |
| 20 | - description: Address offset and size for mdp register set |
| 21 | - description: Address offset and size for regdma register set |
| 22 | - description: Address offset and size for vbif register set |
| 23 | - description: Address offset and size for non-realtime vbif register set |
| 24 | |
| 25 | reg-names: |
| 26 | items: |
| 27 | - const: mdp |
| 28 | - const: regdma |
| 29 | - const: vbif |
| 30 | - const: vbif_nrt |
| 31 | |
| 32 | clocks: |
| 33 | items: |
| 34 | - description: Display ahb clock |
| 35 | - description: Display axi clock |
| 36 | - description: Display mem-noc clock |
| 37 | - description: Display core clock |
| 38 | - description: Display vsync clock |
| 39 | |
| 40 | clock-names: |
| 41 | items: |
| 42 | - const: iface |
| 43 | - const: bus |
| 44 | - const: mnoc |
| 45 | - const: core |
| 46 | - const: vsync |
| 47 | |
| 48 | required: |
| 49 | - compatible |
| 50 | - reg |
| 51 | - reg-names |
| 52 | - clocks |
| 53 | - clock-names |
| 54 | |
| 55 | unevaluatedProperties: false |
| 56 | |
| 57 | examples: |
| 58 | - | |
| 59 | #include <dt-bindings/clock/qcom,mmcc-msm8998.h> |
| 60 | #include <dt-bindings/power/qcom-rpmpd.h> |
| 61 | |
| 62 | display-controller@c901000 { |
| 63 | compatible = "qcom,msm8998-dpu"; |
| 64 | reg = <0x0c901000 0x8f000>, |
| 65 | <0x0c9a8e00 0xf0>, |
| 66 | <0x0c9b0000 0x2008>, |
| 67 | <0x0c9b8000 0x1040>; |
| 68 | reg-names = "mdp", "regdma", "vbif", "vbif_nrt"; |
| 69 | |
| 70 | clocks = <&mmcc MDSS_AHB_CLK>, |
| 71 | <&mmcc MDSS_AXI_CLK>, |
| 72 | <&mmcc MNOC_AHB_CLK>, |
| 73 | <&mmcc MDSS_MDP_CLK>, |
| 74 | <&mmcc MDSS_VSYNC_CLK>; |
| 75 | clock-names = "iface", "bus", "mnoc", "core", "vsync"; |
| 76 | |
| 77 | interrupt-parent = <&mdss>; |
| 78 | interrupts = <0>; |
| 79 | operating-points-v2 = <&mdp_opp_table>; |
| 80 | power-domains = <&rpmpd MSM8998_VDDMX>; |
| 81 | |
| 82 | ports { |
| 83 | #address-cells = <1>; |
| 84 | #size-cells = <0>; |
| 85 | |
| 86 | port@0 { |
| 87 | reg = <0>; |
| 88 | endpoint { |
| 89 | remote-endpoint = <&dsi0_in>; |
| 90 | }; |
| 91 | }; |
| 92 | |
| 93 | port@1 { |
| 94 | reg = <1>; |
| 95 | endpoint { |
| 96 | remote-endpoint = <&dsi1_in>; |
| 97 | }; |
| 98 | }; |
| 99 | }; |
| 100 | }; |
| 101 | ... |