blob: b91462587df50ee1e8d53c35319ecaf29dacc3e3 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on MSM8909, MSM8917 and QM215
8
9maintainers:
10 - Stephan Gerhold <stephan@gerhold.net>
11
12description: |
13 Qualcomm global clock control module provides the clocks, resets and power
14 domains on MSM8909, MSM8917 or QM215.
15
16 See also::
17 include/dt-bindings/clock/qcom,gcc-msm8909.h
18 include/dt-bindings/clock/qcom,gcc-msm8917.h
19
20properties:
21 compatible:
22 enum:
23 - qcom,gcc-msm8909
24 - qcom,gcc-msm8917
25 - qcom,gcc-qm215
26
27 clocks:
28 items:
29 - description: XO source
30 - description: Sleep clock source
31 - description: DSI phy instance 0 dsi clock
32 - description: DSI phy instance 0 byte clock
33
34 clock-names:
35 items:
36 - const: xo
37 - const: sleep_clk
38 - const: dsi0pll
39 - const: dsi0pllbyte
40
41required:
42 - compatible
43 - clocks
44 - clock-names
45
46allOf:
47 - $ref: qcom,gcc.yaml#
48
49unevaluatedProperties: false
50
51examples:
52 - |
53 gcc: clock-controller@1800000 {
54 compatible = "qcom,gcc-msm8909";
55 reg = <0x01800000 0x80000>;
56 #clock-cells = <1>;
57 #reset-cells = <1>;
58 #power-domain-cells = <1>;
59 clocks = <&xo_board>, <&sleep_clk>, <&dsi0_phy 1>, <&dsi0_phy 0>;
60 clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";
61 };
62...