Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm Camera Clock & Reset Controller on SM8250 |
| 8 | |
| 9 | maintainers: |
| 10 | - Jonathan Marek <jonathan@marek.ca> |
| 11 | |
| 12 | description: | |
| 13 | Qualcomm camera clock control module provides the clocks, resets and |
| 14 | power domains on SM8250. |
| 15 | |
| 16 | See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | const: qcom,sm8250-camcc |
| 21 | |
| 22 | clocks: |
| 23 | items: |
| 24 | - description: AHB |
| 25 | - description: Board XO source |
| 26 | - description: Board active XO source |
| 27 | - description: Sleep clock source |
| 28 | |
| 29 | clock-names: |
| 30 | items: |
| 31 | - const: iface |
| 32 | - const: bi_tcxo |
| 33 | - const: bi_tcxo_ao |
| 34 | - const: sleep_clk |
| 35 | |
| 36 | '#clock-cells': |
| 37 | const: 1 |
| 38 | |
| 39 | '#reset-cells': |
| 40 | const: 1 |
| 41 | |
| 42 | '#power-domain-cells': |
| 43 | const: 1 |
| 44 | |
| 45 | power-domains: |
| 46 | items: |
| 47 | - description: MMCX power domain |
| 48 | |
| 49 | reg: |
| 50 | maxItems: 1 |
| 51 | |
| 52 | required-opps: |
| 53 | maxItems: 1 |
| 54 | description: |
| 55 | OPP node describing required MMCX performance point. |
| 56 | |
| 57 | required: |
| 58 | - compatible |
| 59 | - reg |
| 60 | - clocks |
| 61 | - clock-names |
| 62 | - '#clock-cells' |
| 63 | - '#reset-cells' |
| 64 | - '#power-domain-cells' |
| 65 | |
| 66 | additionalProperties: false |
| 67 | |
| 68 | examples: |
| 69 | - | |
| 70 | #include <dt-bindings/clock/qcom,gcc-sm8250.h> |
| 71 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 72 | clock-controller@ad00000 { |
| 73 | compatible = "qcom,sm8250-camcc"; |
| 74 | reg = <0x0ad00000 0x10000>; |
| 75 | clocks = <&gcc GCC_CAMERA_AHB_CLK>, |
| 76 | <&rpmhcc RPMH_CXO_CLK>, |
| 77 | <&rpmhcc RPMH_CXO_CLK_A>, |
| 78 | <&sleep_clk>; |
| 79 | clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; |
| 80 | #clock-cells = <1>; |
| 81 | #reset-cells = <1>; |
| 82 | #power-domain-cells = <1>; |
| 83 | }; |
| 84 | ... |