blob: b327ecb4e5246fc7030d7fd10bd973d6a4d88bd1 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/mediatek,mt8365-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Functional Clock Controller for MT8365
8
9maintainers:
10 - Markus Schneider-Pargmann <msp@baylibre.com>
11
12properties:
13 compatible:
14 items:
15 - enum:
16 - mediatek,mt8365-apu
17 - mediatek,mt8365-imgsys
18 - mediatek,mt8365-mfgcfg
19 - mediatek,mt8365-vdecsys
20 - mediatek,mt8365-vencsys
21 - const: syscon
22
23 reg:
24 maxItems: 1
25
26 '#clock-cells':
27 const: 1
28
29required:
30 - compatible
31 - reg
32 - '#clock-cells'
33
34additionalProperties: false
35
36examples:
37 - |
38 apu: clock-controller@19020000 {
39 compatible = "mediatek,mt8365-apu", "syscon";
40 reg = <0x19020000 0x1000>;
41 #clock-cells = <1>;
42 };