| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A83t Display Engine 2/3 Clock Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Chen-Yu Tsai <wens@csie.org> |
| 11 | - Maxime Ripard <mripard@kernel.org> |
| 12 | |
| 13 | properties: |
| 14 | "#clock-cells": |
| 15 | const: 1 |
| 16 | |
| 17 | "#reset-cells": |
| 18 | const: 1 |
| 19 | |
| 20 | compatible: |
| 21 | oneOf: |
| 22 | - const: allwinner,sun8i-a83t-de2-clk |
| 23 | - const: allwinner,sun8i-h3-de2-clk |
| 24 | - const: allwinner,sun8i-v3s-de2-clk |
| 25 | - const: allwinner,sun50i-a64-de2-clk |
| 26 | - const: allwinner,sun50i-h5-de2-clk |
| 27 | - const: allwinner,sun50i-h6-de3-clk |
| 28 | - items: |
| 29 | - const: allwinner,sun8i-r40-de2-clk |
| 30 | - const: allwinner,sun8i-h3-de2-clk |
| 31 | - items: |
| 32 | - const: allwinner,sun20i-d1-de2-clk |
| 33 | - const: allwinner,sun50i-h5-de2-clk |
| 34 | |
| 35 | reg: |
| 36 | maxItems: 1 |
| 37 | |
| 38 | clocks: |
| 39 | items: |
| 40 | - description: Bus Clock |
| 41 | - description: Module Clock |
| 42 | |
| 43 | clock-names: |
| 44 | items: |
| 45 | - const: bus |
| 46 | - const: mod |
| 47 | |
| 48 | resets: |
| 49 | maxItems: 1 |
| 50 | |
| 51 | required: |
| 52 | - "#clock-cells" |
| 53 | - "#reset-cells" |
| 54 | - compatible |
| 55 | - reg |
| 56 | - clocks |
| 57 | - clock-names |
| 58 | - resets |
| 59 | |
| 60 | additionalProperties: false |
| 61 | |
| 62 | examples: |
| 63 | - | |
| 64 | #include <dt-bindings/clock/sun8i-h3-ccu.h> |
| 65 | #include <dt-bindings/reset/sun8i-h3-ccu.h> |
| 66 | |
| 67 | de2_clocks: clock@1000000 { |
| 68 | compatible = "allwinner,sun8i-h3-de2-clk"; |
| 69 | reg = <0x01000000 0x100000>; |
| 70 | clocks = <&ccu CLK_BUS_DE>, |
| 71 | <&ccu CLK_DE>; |
| 72 | clock-names = "bus", |
| 73 | "mod"; |
| 74 | resets = <&ccu RST_BUS_DE>; |
| 75 | #clock-cells = <1>; |
| 76 | #reset-cells = <1>; |
| 77 | }; |
| 78 | |
| 79 | ... |