| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | Mediatek vencsys controller |
| 2 | ============================ |
| 3 | |
| 4 | The Mediatek vencsys controller provides various clocks to the system. |
| 5 | |
| 6 | Required Properties: |
| 7 | |
| 8 | - compatible: Should be one of: |
| 9 | - "mediatek,mt2712-vencsys", "syscon" |
| 10 | - "mediatek,mt6779-vencsys", "syscon" |
| 11 | - "mediatek,mt6797-vencsys", "syscon" |
| 12 | - "mediatek,mt8173-vencsys", "syscon" |
| 13 | - "mediatek,mt8183-vencsys", "syscon" |
| 14 | - #clock-cells: Must be 1 |
| 15 | |
| 16 | The vencsys controller uses the common clk binding from |
| 17 | Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 18 | The available clocks are defined in dt-bindings/clock/mt*-clk.h. |
| 19 | |
| 20 | Example: |
| 21 | |
| 22 | vencsys: clock-controller@18000000 { |
| 23 | compatible = "mediatek,mt8173-vencsys", "syscon"; |
| 24 | reg = <0 0x18000000 0 0x1000>; |
| 25 | #clock-cells = <1>; |
| 26 | }; |