Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/arm/arm,scu.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ARM Snoop Control Unit (SCU) |
| 8 | |
| 9 | maintainers: |
| 10 | - Linus Walleij <linus.walleij@linaro.org> |
| 11 | |
| 12 | description: | |
| 13 | As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided |
| 14 | with a Snoop Control Unit. The register range is usually 256 (0x100) |
| 15 | bytes. |
| 16 | |
| 17 | References: |
| 18 | - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual |
| 19 | Revision r2p0 |
| 20 | - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual |
| 21 | Revision r0p1 |
| 22 | - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference |
| 23 | Manial Revision r2p0 |
| 24 | |
| 25 | properties: |
| 26 | compatible: |
| 27 | enum: |
| 28 | - arm,cortex-a9-scu |
| 29 | - arm,cortex-a5-scu |
| 30 | - arm,arm11mp-scu |
| 31 | |
| 32 | reg: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | required: |
| 36 | - compatible |
| 37 | - reg |
| 38 | |
| 39 | additionalProperties: false |
| 40 | |
| 41 | examples: |
| 42 | - | |
| 43 | scu@a0410000 { |
| 44 | compatible = "arm,cortex-a9-scu"; |
| 45 | reg = <0xa0410000 0x100>; |
| 46 | }; |