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Stefano Babic4c8d4122016-06-06 11:19:42 +02001/*
2 * Copyright (C) Stefano Babic <sbabic@denx.de>
3 *
4 * Configuration settings for the E+L i.MX6Q DO82 board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __EL6Q_COMMON_CONFIG_H
10#define __EL6Q_COMMON_CONFIG_H
11
12#define CONFIG_BOARD_NAME EL6Q
13
Stefano Babic4c8d4122016-06-06 11:19:42 +020014#include "mx6_common.h"
15
16#define CONFIG_IMX_THERMAL
17
18/* Size of malloc() pool */
19#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
20
Stefano Babic4c8d4122016-06-06 11:19:42 +020021#define CONFIG_MXC_UART
22
23#ifdef CONFIG_SPL
Stefano Babic4c8d4122016-06-06 11:19:42 +020024#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
Stefano Babic4c8d4122016-06-06 11:19:42 +020025#include "imx6_spl.h"
26#endif
27
28/* MMC Configs */
29#define CONFIG_SYS_FSL_ESDHC_ADDR 0
30#define CONFIG_SYS_FSL_USDHC_NUM 2
31
32/* I2C config */
33#define CONFIG_SYS_I2C
34#define CONFIG_SYS_I2C_MXC
35#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
36#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
37#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
38#define CONFIG_SYS_I2C_SPEED 100000
39
40/* PMIC */
41#define CONFIG_POWER
42#define CONFIG_POWER_I2C
43#define CONFIG_POWER_PFUZE100
44#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
45
46/* Commands */
Stefano Babic4c8d4122016-06-06 11:19:42 +020047#define CONFIG_SF_DEFAULT_BUS 3
48#define CONFIG_SF_DEFAULT_CS 0
49#define CONFIG_SF_DEFAULT_SPEED 20000000
50#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
51
52/* allow to overwrite serial and ethaddr */
53#define CONFIG_ENV_OVERWRITE
54#define CONFIG_MXC_UART_BASE UART2_BASE
Stefano Babic4c8d4122016-06-06 11:19:42 +020055
Stefano Babic4c8d4122016-06-06 11:19:42 +020056#define CONFIG_BOARD_NAME EL6Q
57
Stefano Babic4c8d4122016-06-06 11:19:42 +020058#define CONFIG_EXTRA_ENV_SETTINGS \
59 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
60 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
61 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
Simon Glass4694a742016-10-17 20:12:39 -060062 "console=" CONSOLE_DEV "\0" \
Stefano Babic4c8d4122016-06-06 11:19:42 +020063 "fdtfile=undefined\0" \
64 "fdt_high=0xffffffff\0" \
65 "fdt_addr_r=0x18000000\0" \
66 "fdt_addr=0x18000000\0" \
67 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
68 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
69 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
70 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
71 BOOTENV
72
73#define BOOT_TARGET_DEVICES(func) \
74 func(MMC, mmc, 0) \
75 func(MMC, mmc, 1) \
76 func(PXE, PXE, na) \
77 func(DHCP, dhcp, na)
78
Stefano Babic4c8d4122016-06-06 11:19:42 +020079#include <config_distro_bootcmd.h>
80
81#define CONFIG_ARP_TIMEOUT 200UL
82
Stefano Babic4c8d4122016-06-06 11:19:42 +020083#define CONFIG_SYS_MEMTEST_START 0x10000000
84#define CONFIG_SYS_MEMTEST_END 0x10800000
85#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
86
Stefano Babic4c8d4122016-06-06 11:19:42 +020087/* Physical Memory Map */
88#define CONFIG_NR_DRAM_BANKS 1
89#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
90
91#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
92#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
93#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
94
95#define CONFIG_SYS_INIT_SP_OFFSET \
96 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
97#define CONFIG_SYS_INIT_SP_ADDR \
98 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
99
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900100/* environment organization */
Stefano Babic4c8d4122016-06-06 11:19:42 +0200101
102#define CONFIG_ENV_SIZE (8 * 1024)
103
Stefano Babic4c8d4122016-06-06 11:19:42 +0200104#if defined(CONFIG_ENV_IS_IN_MMC)
105#define CONFIG_SYS_MMC_ENV_DEV 1
106#define CONFIG_SYS_MMC_ENV_PART 2
107#define CONFIG_ENV_OFFSET 0x0
108#endif
109
110#endif /* __EL6Q_COMMON_CONFIG_H */