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wdenkc12081a2004-03-23 20:18:25 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001-2004
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
wdenkc12081a2004-03-23 20:18:25 +00009 */
10
11#include <common.h>
12#include <linux/byteorder/swab.h>
13
14
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020015flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenkc12081a2004-03-23 20:18:25 +000016
17/* Board support for 1 or 2 flash devices */
18#define FLASH_PORT_WIDTH32
19#undef FLASH_PORT_WIDTH16
20
21#ifdef FLASH_PORT_WIDTH16
Wolfgang Denka1be4762008-05-20 16:00:29 +020022#define FLASH_PORT_WIDTH ushort
23#define FLASH_PORT_WIDTHV vu_short
24#define SWAP(x) (x)
wdenkc12081a2004-03-23 20:18:25 +000025#else
Wolfgang Denka1be4762008-05-20 16:00:29 +020026#define FLASH_PORT_WIDTH ulong
27#define FLASH_PORT_WIDTHV vu_long
28#define SWAP(x) (x)
wdenkc12081a2004-03-23 20:18:25 +000029#endif
30
31/* Intel-compatible flash ID */
Wolfgang Denka1be4762008-05-20 16:00:29 +020032#define INTEL_COMPAT 0x00890089
33#define INTEL_ALT 0x00B000B0
wdenkc12081a2004-03-23 20:18:25 +000034
35/* Intel-compatible flash commands */
Wolfgang Denka1be4762008-05-20 16:00:29 +020036#define INTEL_PROGRAM 0x00100010
37#define INTEL_ERASE 0x00200020
38#define INTEL_CLEAR 0x00500050
39#define INTEL_LOCKBIT 0x00600060
40#define INTEL_PROTECT 0x00010001
41#define INTEL_STATUS 0x00700070
42#define INTEL_READID 0x00900090
43#define INTEL_CONFIRM 0x00D000D0
44#define INTEL_RESET 0xFFFFFFFF
wdenkc12081a2004-03-23 20:18:25 +000045
46/* Intel-compatible flash status bits */
Wolfgang Denka1be4762008-05-20 16:00:29 +020047#define INTEL_FINISHED 0x00800080
48#define INTEL_OK 0x00800080
wdenkc12081a2004-03-23 20:18:25 +000049
Wolfgang Denka1be4762008-05-20 16:00:29 +020050#define FPW FLASH_PORT_WIDTH
51#define FPWV FLASH_PORT_WIDTHV
wdenkc12081a2004-03-23 20:18:25 +000052
53#define mb() __asm__ __volatile__ ("" : : : "memory")
54
55/*-----------------------------------------------------------------------
56 * Functions
57 */
58static ulong flash_get_size (FPW *addr, flash_info_t *info);
59static int write_data (flash_info_t *info, ulong dest, FPW data);
60static void flash_get_offsets (ulong base, flash_info_t *info);
61void inline spin_wheel (void);
Wolfgang Denk862eeeb2005-07-30 16:39:27 +020062static void flash_sync_real_protect (flash_info_t * info);
63static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
wdenkc12081a2004-03-23 20:18:25 +000064
65/*-----------------------------------------------------------------------
66 */
67
68unsigned long flash_init (void)
69{
70 int i;
71 ulong size = 0;
wdenk9e930b62004-06-19 21:19:10 +000072 extern void flash_preinit(void);
73 extern void flash_afterinit(ulong, ulong);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074 ulong flashbase = CONFIG_SYS_FLASH_BASE;
wdenk9e930b62004-06-19 21:19:10 +000075
76 flash_preinit();
wdenkc12081a2004-03-23 20:18:25 +000077
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
wdenkc12081a2004-03-23 20:18:25 +000079 switch (i) {
80 case 0:
wdenk9e930b62004-06-19 21:19:10 +000081 memset(&flash_info[i], 0, sizeof(flash_info_t));
82 flash_get_size ((FPW *) flashbase, &flash_info[i]);
83 flash_get_offsets (flash_info[i].start[0], &flash_info[i]);
wdenkc12081a2004-03-23 20:18:25 +000084 break;
85 default:
86 panic ("configured to many flash banks!\n");
87 break;
88 }
89 size += flash_info[i].size;
Wolfgang Denk862eeeb2005-07-30 16:39:27 +020090
91 /* get the h/w and s/w protection status in sync */
92 flash_sync_real_protect(&flash_info[i]);
wdenkc12081a2004-03-23 20:18:25 +000093 }
94
95 /* Protect monitor and environment sectors
96 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020097#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
wdenk9e930b62004-06-19 21:19:10 +000098#ifndef CONFIG_BOOT_ROM
wdenkc12081a2004-03-23 20:18:25 +000099 flash_protect ( FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200100 CONFIG_SYS_MONITOR_BASE,
101 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
wdenkc12081a2004-03-23 20:18:25 +0000102 &flash_info[0] );
wdenk9e930b62004-06-19 21:19:10 +0000103#endif
104#endif
wdenkc12081a2004-03-23 20:18:25 +0000105
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200106#ifdef CONFIG_ENV_IS_IN_FLASH
wdenkc12081a2004-03-23 20:18:25 +0000107 flash_protect ( FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200108 CONFIG_ENV_ADDR,
109 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
wdenk9e930b62004-06-19 21:19:10 +0000110#endif
111
112 flash_afterinit(flash_info[0].start[0], flash_info[0].size);
wdenkc12081a2004-03-23 20:18:25 +0000113
114 return size;
115}
116
117/*-----------------------------------------------------------------------
118 */
119static void flash_get_offsets (ulong base, flash_info_t *info)
120{
121 int i;
122
123 if (info->flash_id == FLASH_UNKNOWN) {
124 return;
125 }
126
127 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
128 for (i = 0; i < info->sector_count; i++) {
129 info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
wdenkc12081a2004-03-23 20:18:25 +0000130 }
131 }
132}
133
134/*-----------------------------------------------------------------------
135 */
136void flash_print_info (flash_info_t *info)
137{
138 int i;
139
140 if (info->flash_id == FLASH_UNKNOWN) {
141 printf ("missing or unknown FLASH type\n");
142 return;
143 }
144
145 switch (info->flash_id & FLASH_VENDMASK) {
146 case FLASH_MAN_INTEL:
147 printf ("INTEL ");
148 break;
149 default:
150 printf ("Unknown Vendor ");
151 break;
152 }
153
154 switch (info->flash_id & FLASH_TYPEMASK) {
Wolfgang Denk618582e2005-12-29 15:12:09 +0100155 case FLASH_28F256J3A:
156 printf ("28F256J3A\n");
157 break;
158
wdenkc12081a2004-03-23 20:18:25 +0000159 case FLASH_28F128J3A:
160 printf ("28F128J3A\n");
161 break;
162
163 case FLASH_28F640J3A:
164 printf ("28F640J3A\n");
165 break;
166
167 case FLASH_28F320J3A:
168 printf ("28F320J3A\n");
169 break;
170
171 default:
172 printf ("Unknown Chip Type\n");
173 break;
174 }
175
176 printf (" Size: %ld MB in %d Sectors\n",
177 info->size >> 20, info->sector_count);
178
179 printf (" Sector Start Addresses:");
180 for (i = 0; i < info->sector_count; ++i) {
181 if ((i % 5) == 0)
182 printf ("\n ");
183 printf (" %08lX%s",
184 info->start[i],
185 info->protect[i] ? " (RO)" : " ");
186 }
187 printf ("\n");
188 return;
189}
190
191/*
192 * The following code cannot be run from FLASH!
193 */
194static ulong flash_get_size (FPW *addr, flash_info_t *info)
195{
196 volatile FPW value;
197
198 /* Write auto select command: read Manufacturer ID */
199 addr[0x5555] = (FPW) 0x00AA00AA;
200 addr[0x2AAA] = (FPW) 0x00550055;
201 addr[0x5555] = (FPW) 0x00900090;
202
203 mb ();
wdenk9e930b62004-06-19 21:19:10 +0000204 udelay(100);
205
wdenkc12081a2004-03-23 20:18:25 +0000206 value = addr[0];
207
208 switch (value) {
209
210 case (FPW) INTEL_MANUFACT:
211 info->flash_id = FLASH_MAN_INTEL;
212 break;
213
214 default:
215 info->flash_id = FLASH_UNKNOWN;
216 info->sector_count = 0;
217 info->size = 0;
218 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
219 return (0); /* no or unknown flash */
220 }
221
222 mb ();
223 value = addr[1]; /* device ID */
224
225 switch (value) {
226
Wolfgang Denk618582e2005-12-29 15:12:09 +0100227 case (FPW) INTEL_ID_28F256J3A:
228 info->flash_id += FLASH_28F256J3A;
Wolfgang Denk7e4fe592006-01-13 17:00:56 +0100229 /* In U-Boot we support only 32 MB (no bank-switching) */
230 info->sector_count = 256 / 2;
231 info->size = 0x04000000 / 2;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200232 info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
Wolfgang Denk7e4fe592006-01-13 17:00:56 +0100233 break; /* => 32 MB */
Wolfgang Denk618582e2005-12-29 15:12:09 +0100234
wdenkc12081a2004-03-23 20:18:25 +0000235 case (FPW) INTEL_ID_28F128J3A:
236 info->flash_id += FLASH_28F128J3A;
237 info->sector_count = 128;
238 info->size = 0x02000000;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200239 info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
wdenkc12081a2004-03-23 20:18:25 +0000240 break; /* => 32 MB */
241
242 case (FPW) INTEL_ID_28F640J3A:
243 info->flash_id += FLASH_28F640J3A;
244 info->sector_count = 64;
245 info->size = 0x01000000;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246 info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03000000;
wdenkc12081a2004-03-23 20:18:25 +0000247 break; /* => 16 MB */
248
249 case (FPW) INTEL_ID_28F320J3A:
250 info->flash_id += FLASH_28F320J3A;
251 info->sector_count = 32;
wdenk9e930b62004-06-19 21:19:10 +0000252 info->size = 0x800000;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200253 info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03800000;
wdenkc12081a2004-03-23 20:18:25 +0000254 break; /* => 8 MB */
255
256 default:
257 info->flash_id = FLASH_UNKNOWN;
258 break;
259 }
260
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
wdenkc12081a2004-03-23 20:18:25 +0000262 printf ("** ERROR: sector count %d > max (%d) **\n",
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200263 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
264 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
wdenkc12081a2004-03-23 20:18:25 +0000265 }
266
267 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
268
269 return (info->size);
270}
271
272
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200273/*
274 * This function gets the u-boot flash sector protection status
275 * (flash_info_t.protect[]) in sync with the sector protection
276 * status stored in hardware.
277 */
278static void flash_sync_real_protect (flash_info_t * info)
279{
280 int i;
281
282 switch (info->flash_id & FLASH_TYPEMASK) {
283
Wolfgang Denk618582e2005-12-29 15:12:09 +0100284 case FLASH_28F256J3A:
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200285 case FLASH_28F128J3A:
286 case FLASH_28F640J3A:
287 case FLASH_28F320J3A:
288 for (i = 0; i < info->sector_count; ++i) {
289 info->protect[i] = intel_sector_protected(info, i);
290 }
291 break;
292 default:
293 /* no h/w protect support */
294 break;
295 }
296}
297
298
299/*
300 * checks if "sector" in bank "info" is protected. Should work on intel
301 * strata flash chips 28FxxxJ3x in 8-bit mode.
302 * Returns 1 if sector is protected (or timed-out while trying to read
303 * protection status), 0 if it is not.
304 */
305static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
306{
307 FPWV *addr;
308 FPWV *lock_conf_addr;
309 ulong start;
310 unsigned char ret;
311
312 /*
313 * first, wait for the WSM to be finished. The rationale for
314 * waiting for the WSM to become idle for at most
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200315 * CONFIG_SYS_FLASH_ERASE_TOUT is as follows. The WSM can be busy
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200316 * because of: (1) erase, (2) program or (3) lock bit
317 * configuration. So we just wait for the longest timeout of
318 * the (1)-(3), i.e. the erase timeout.
319 */
320
321 /* wait at least 35ns (W12) before issuing Read Status Register */
322 udelay(1);
323 addr = (FPWV *) info->start[sector];
324 *addr = (FPW) INTEL_STATUS;
325
326 start = get_timer (0);
327 while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200328 if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200329 *addr = (FPW) INTEL_RESET; /* restore read mode */
330 printf("WSM busy too long, can't get prot status\n");
331 return 1;
332 }
333 }
Wolfgang Denkd06ce5d2005-08-02 17:06:17 +0200334
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200335 /* issue the Read Identifier Codes command */
336 *addr = (FPW) INTEL_READID;
337
338 /* wait at least 35ns (W12) before reading */
339 udelay(1);
340
341 /* Intel example code uses offset of 2 for 16 bit flash */
342 lock_conf_addr = (FPWV *) info->start[sector] + 2;
343 ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
344
345 /* put flash back in read mode */
346 *addr = (FPW) INTEL_RESET;
347
348 return ret;
349}
350
wdenkc12081a2004-03-23 20:18:25 +0000351/*-----------------------------------------------------------------------
352 */
353
354int flash_erase (flash_info_t *info, int s_first, int s_last)
355{
356 int flag, prot, sect;
Wolfgang Denk3eec19c2011-11-04 15:55:16 +0000357 ulong type, start;
wdenkc12081a2004-03-23 20:18:25 +0000358 int rcode = 0;
359
360 if ((s_first < 0) || (s_first > s_last)) {
361 if (info->flash_id == FLASH_UNKNOWN) {
362 printf ("- missing\n");
363 } else {
364 printf ("- no sectors to erase\n");
365 }
366 return 1;
367 }
368
369 type = (info->flash_id & FLASH_VENDMASK);
370 if ((type != FLASH_MAN_INTEL)) {
371 printf ("Can't erase unknown flash type %08lx - aborted\n",
372 info->flash_id);
373 return 1;
374 }
375
376 prot = 0;
377 for (sect = s_first; sect <= s_last; ++sect) {
378 if (info->protect[sect]) {
379 prot++;
380 }
381 }
382
383 if (prot) {
384 printf ("- Warning: %d protected sectors will not be erased!\n",
385 prot);
386 } else {
387 printf ("\n");
388 }
389
390 start = get_timer (0);
wdenkc12081a2004-03-23 20:18:25 +0000391
392 /* Disable interrupts which might cause a timeout here */
393 flag = disable_interrupts ();
394
395 /* Start erase on unprotected sectors */
396 for (sect = s_first; sect <= s_last; sect++) {
397 if (info->protect[sect] == 0) { /* not protected */
398 FPWV *addr = (FPWV *) (info->start[sect]);
399 FPW status;
400
401 printf ("Erasing sector %2d ... ", sect);
402
403 /* arm simple, non interrupt dependent timer */
404 start = get_timer(0);
405
406 *addr = (FPW) 0x00500050; /* clear status register */
407 *addr = (FPW) 0x00200020; /* erase setup */
408 *addr = (FPW) 0x00D000D0; /* erase confirm */
409
410 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200411 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
wdenkc12081a2004-03-23 20:18:25 +0000412 printf ("Timeout\n");
413 *addr = (FPW) 0x00B000B0; /* suspend erase */
414 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
415 rcode = 1;
416 break;
417 }
418 }
419
420 *addr = 0x00500050; /* clear status register cmd. */
421 *addr = 0x00FF00FF; /* resest to read mode */
422
423 printf (" done\n");
424 }
425 }
Wolfgang Denk3eec19c2011-11-04 15:55:16 +0000426
427 if (flag)
428 enable_interrupts();
429
wdenkc12081a2004-03-23 20:18:25 +0000430 return rcode;
431}
432
433/*-----------------------------------------------------------------------
434 * Copy memory to flash, returns:
435 * 0 - OK
436 * 1 - write timeout
437 * 2 - Flash not erased
438 * 4 - Flash not identified
439 */
440
441int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
442{
443 ulong cp, wp;
444 FPW data;
445 int count, i, l, rc, port_width;
446
447 if (info->flash_id == FLASH_UNKNOWN) {
448 return 4;
449 }
450/* get lower word aligned address */
451#ifdef FLASH_PORT_WIDTH16
452 wp = (addr & ~1);
453 port_width = 2;
454#else
455 wp = (addr & ~3);
456 port_width = 4;
457#endif
458
459 /*
460 * handle unaligned start bytes
461 */
462 if ((l = addr - wp) != 0) {
463 data = 0;
464 for (i = 0, cp = wp; i < l; ++i, ++cp) {
465 data = (data << 8) | (*(uchar *) cp);
466 }
467 for (; i < port_width && cnt > 0; ++i) {
468 data = (data << 8) | *src++;
469 --cnt;
470 ++cp;
471 }
472 for (; cnt == 0 && i < port_width; ++i, ++cp) {
473 data = (data << 8) | (*(uchar *) cp);
474 }
475
476 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
477 return (rc);
478 }
479 wp += port_width;
480 }
481
482 /*
483 * handle word aligned part
484 */
485 count = 0;
486 while (cnt >= port_width) {
487 data = 0;
488 for (i = 0; i < port_width; ++i) {
489 data = (data << 8) | *src++;
490 }
491 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
492 return (rc);
493 }
494 wp += port_width;
495 cnt -= port_width;
496 if (count++ > 0x800) {
497 spin_wheel ();
498 count = 0;
499 }
500 }
501
502 if (cnt == 0) {
503 return (0);
504 }
505
506 /*
507 * handle unaligned tail bytes
508 */
509 data = 0;
510 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
511 data = (data << 8) | *src++;
512 --cnt;
513 }
514 for (; i < port_width; ++i, ++cp) {
515 data = (data << 8) | (*(uchar *) cp);
516 }
517
518 return (write_data (info, wp, SWAP (data)));
519}
520
521/*-----------------------------------------------------------------------
522 * Write a word or halfword to Flash, returns:
523 * 0 - OK
524 * 1 - write timeout
525 * 2 - Flash not erased
526 */
527static int write_data (flash_info_t *info, ulong dest, FPW data)
528{
529 FPWV *addr = (FPWV *) dest;
530 ulong status;
531 ulong start;
532 int flag;
Wolfgang Denk3eec19c2011-11-04 15:55:16 +0000533 int rcode = 0;
wdenkc12081a2004-03-23 20:18:25 +0000534
535 /* Check if Flash is (sufficiently) erased */
536 if ((*addr & data) != data) {
537 printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
538 return (2);
539 }
540 /* Disable interrupts which might cause a timeout here */
541 flag = disable_interrupts ();
542
543 *addr = (FPW) 0x00400040; /* write setup */
544 *addr = data;
545
546 /* arm simple, non interrupt dependent timer */
547 start = get_timer(0);
548
549 /* wait while polling the status register */
550 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200551 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
Wolfgang Denk3eec19c2011-11-04 15:55:16 +0000552 rcode = 1;
553 break;
wdenkc12081a2004-03-23 20:18:25 +0000554 }
555 }
556
557 *addr = (FPW) 0x00FF00FF; /* restore read mode */
558
Wolfgang Denk3eec19c2011-11-04 15:55:16 +0000559 if (flag)
560 enable_interrupts();
561
562 return rcode;
wdenkc12081a2004-03-23 20:18:25 +0000563}
564
565void inline spin_wheel (void)
566{
567 static int p = 0;
568 static char w[] = "\\/-";
569
570 printf ("\010%c", w[p]);
571 (++p == 3) ? (p = 0) : 0;
572}
573
574/*-----------------------------------------------------------------------
575 * Set/Clear sector's lock bit, returns:
576 * 0 - OK
577 * 1 - Error (timeout, voltage problems, etc.)
578 */
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200579int flash_real_protect (flash_info_t *info, long sector, int prot)
wdenkc12081a2004-03-23 20:18:25 +0000580{
581 ulong start;
582 int i;
583 int rc = 0;
584 vu_long *addr = (vu_long *)(info->start[sector]);
585 int flag = disable_interrupts();
586
587 *addr = INTEL_CLEAR; /* Clear status register */
588 if (prot) { /* Set sector lock bit */
589 *addr = INTEL_LOCKBIT; /* Sector lock bit */
590 *addr = INTEL_PROTECT; /* set */
591 }
592 else { /* Clear sector lock bit */
593 *addr = INTEL_LOCKBIT; /* All sectors lock bits */
594 *addr = INTEL_CONFIRM; /* clear */
595 }
596
597 start = get_timer(0);
598
599 while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200600 if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
wdenkc12081a2004-03-23 20:18:25 +0000601 printf("Flash lock bit operation timed out\n");
602 rc = 1;
603 break;
604 }
605 }
606
607 if (*addr != INTEL_OK) {
608 printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
609 (uint)addr, (uint)*addr);
610 rc = 1;
611 }
612
613 if (!rc)
614 info->protect[sector] = prot;
615
616 /*
617 * Clear lock bit command clears all sectors lock bits, so
618 * we have to restore lock bits of protected sectors.
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200619 * WARNING: code below re-locks sectors only for one bank (info).
620 * This causes problems on boards where several banks share
621 * the same chip, as sectors in othere banks will be unlocked
622 * but not re-locked. It works fine on pm520 though, as there
623 * is only one chip and one bank.
wdenkc12081a2004-03-23 20:18:25 +0000624 */
625 if (!prot)
626 {
627 for (i = 0; i < info->sector_count; i++)
628 {
629 if (info->protect[i])
630 {
631 start = get_timer(0);
632 addr = (vu_long *)(info->start[i]);
633 *addr = INTEL_LOCKBIT; /* Sector lock bit */
634 *addr = INTEL_PROTECT; /* set */
635 while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
636 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200637 if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT)
wdenkc12081a2004-03-23 20:18:25 +0000638 {
639 printf("Flash lock bit operation timed out\n");
640 rc = 1;
641 break;
642 }
643 }
644 }
645 }
Wolfgang Denk862eeeb2005-07-30 16:39:27 +0200646 /*
647 * get the s/w sector protection status in sync with the h/w,
648 * in case something went wrong during the re-locking.
649 */
650 flash_sync_real_protect(info); /* resets flash to read mode */
wdenkc12081a2004-03-23 20:18:25 +0000651 }
652
653 if (flag)
654 enable_interrupts();
655
656 *addr = INTEL_RESET; /* Reset to read array mode */
657
658 return rc;
659}