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git01.mediatek.com / filogic / uboot / 529ea1c3536314bf79d44362bb0b4a459bad55d5 / . / configs / mscc_ocelot_defconfig
blob: cbbe11988875e443ec7c7833322a9533d2af1083 [file] [log] [blame]
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]1CONFIG_MIPS=y
2CONFIG_SYS_TEXT_BASE=0x40000000
3CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]5CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_OFFSET=0x100000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]8CONFIG_DEBUG_UART_BOARD_INIT=y
9CONFIG_DEBUG_UART_BASE=0x70100000
10CONFIG_DEBUG_UART_CLOCK=250000000
11CONFIG_ARCH_MSCC=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]12CONFIG_SYS_LITTLE_ENDIAN=y
13CONFIG_DEBUG_UART=y
14CONFIG_FIT=y
15CONFIG_BOOTDELAY=3
16CONFIG_USE_BOOTARGS=y
17CONFIG_BOOTARGS="console=ttyS0,115200"
18CONFIG_LOGLEVEL=7
19CONFIG_DISPLAY_CPUINFO=y
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]20CONFIG_SYS_PROMPT="ocelot # "
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]21# CONFIG_CMD_BDI is not set
22# CONFIG_CMD_CONSOLE is not set
23# CONFIG_CMD_ELF is not set
24# CONFIG_CMD_EXPORTENV is not set
25# CONFIG_CMD_IMPORTENV is not set
26# CONFIG_CMD_CRC32 is not set
27CONFIG_CMD_MD5SUM=y
28CONFIG_CMD_MEMINFO=y
29CONFIG_CMD_MEMTEST=y
30# CONFIG_CMD_FLASH is not set
31CONFIG_CMD_GPIO=y
32CONFIG_CMD_MTD=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]33CONFIG_CMD_SPI=y
34CONFIG_CMD_DHCP=y
35# CONFIG_NET_TFTP_VARS is not set
36# CONFIG_CMD_NFS is not set
37CONFIG_CMD_PING=y
38CONFIG_CMD_MTDPARTS=y
39CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
40CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),15m(linux),15m(linux.bk)"
41CONFIG_CMD_UBI=y
42# CONFIG_CMD_UBIFS is not set
43# CONFIG_ISO_PARTITION is not set
44CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123"
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]45CONFIG_OF_LIST="ocelot_pcb120 ocelot_pcb123"
46CONFIG_DTB_RESELECT=y
47CONFIG_MULTI_DTB_FIT=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]48CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]49CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]50CONFIG_ENV_OFFSET_REDUND=0x140000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]51CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]52CONFIG_NET_RANDOM_ETHADDR=y
53CONFIG_CLK=y
Lars Povlsenc89dc232019-01-02 09:52:26 +0100[diff] [blame]54CONFIG_MSCC_SGPIO=y
55CONFIG_LED=y
56CONFIG_LED_GPIO=y
Miquel Raynal72d7b8b2019-10-03 19:50:07 +0200[diff] [blame]57CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]58CONFIG_DM_MTD=y
Tom Rini88edbd02019-01-19 09:39:42 -0500[diff] [blame]59CONFIG_MTD_SPI_NAND=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]60CONFIG_DM_SPI_FLASH=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]61CONFIG_SPI_FLASH_BAR=y
62CONFIG_SPI_FLASH_GIGADEVICE=y
63CONFIG_SPI_FLASH_MACRONIX=y
64CONFIG_SPI_FLASH_SPANSION=y
65CONFIG_SPI_FLASH_WINBOND=y
66CONFIG_SPI_FLASH_MTD=y
67CONFIG_DM_ETH=y
Gregory CLEMENTa8112352019-01-17 17:07:15 +0100[diff] [blame]68CONFIG_MSCC_OCELOT_SWITCH=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]69CONFIG_PINCTRL=y
70CONFIG_PINCONF=y
71CONFIG_DM_SERIAL=y
72CONFIG_DEBUG_UART_SHIFT=2
73CONFIG_DEBUG_UART_ANNOUNCE=y
74CONFIG_SYS_NS16550=y
75CONFIG_SPI=y
76CONFIG_DM_SPI=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]77CONFIG_LZMA=y