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Fabio Estevamebc8fcc2019-12-09 10:43:03 -03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the Embedded Artists i.MX7ULP COM board.
6 */
7
8#ifndef __MX7ULP_COM_CONFIG_H
9#define __MX7ULP_COM_CONFIG_H
10
11#include <linux/sizes.h>
12#include <asm/arch/imx-regs.h>
13
14#define CONFIG_BOARD_POSTCLK_INIT
15#define CONFIG_SYS_BOOTM_LEN 0x1000000
16
17#define SRC_BASE_ADDR CMC1_RBASE
18#define IRAM_BASE_ADDR OCRAM_0_BASE
19#define IOMUXC_BASE_ADDR IOMUXC1_RBASE
20
21/*
22 * Detect overlap between U-Boot image and environment area in build-time
23 *
24 * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot-dtb.imx offset
25 * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
26 *
27 * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
28 * write the direct value here
29 */
30#define CONFIG_BOARD_SIZE_LIMIT 785408
31#define CONFIG_SYS_MMC_ENV_DEV 0
32#define CONFIG_MMCROOT "/dev/mmcblk0p2"
33#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
34
35/* Using ULP WDOG for reset */
36#define WDOG_BASE_ADDR WDG1_RBASE
37
38#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */
39
40#define CONFIG_INITRD_TAG
41#define CONFIG_CMDLINE_TAG
42#define CONFIG_SETUP_MEMORY_TAGS
43
44/* Size of malloc() pool */
45#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
46
47/* UART */
48#define LPUART_BASE LPUART4_RBASE
49
50/* allow to overwrite serial and ethaddr */
51#define CONFIG_ENV_OVERWRITE
52
53/* Physical Memory Map */
54
55#define PHYS_SDRAM 0x60000000
56#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
57#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
58
59#define CONFIG_LOADADDR 0x60800000
60
61#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
62
63#define CONFIG_EXTRA_ENV_SETTINGS \
64 "image=zImage\0" \
65 "console=ttyLP0\0" \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "fdt_file=imx7ulp-com.dtb\0" \
69 "fdt_addr=0x63000000\0" \
70 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
71 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
72 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
73 "mmcargs=setenv bootargs console=${console},${baudrate} " \
74 "root=${mmcroot}\0" \
75 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
76 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
77 "mmcboot=echo Booting from mmc ...; " \
78 "run mmcargs; " \
79 "if run loadfdt; then " \
80 "bootz ${loadaddr} - ${fdt_addr}; " \
81 "fi;\0" \
82
83#define CONFIG_BOOTCOMMAND \
84 "if run loadimage; then " \
85 "run mmcboot; " \
86 "fi; " \
87
88#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
89
90#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
91#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
92
93#define CONFIG_SYS_INIT_SP_OFFSET \
94 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
95#define CONFIG_SYS_INIT_SP_ADDR \
96 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
97
98#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
99#define CONFIG_CMD_CACHE
100#endif
101
102#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
103#endif /* __CONFIG_H */