Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | */ |
| 19 | |
| 20 | #include <common.h> |
| 21 | #include <asm/io.h> |
| 22 | #include <asm/arch/clock.h> |
| 23 | #include <asm/arch/imx-regs.h> |
| 24 | #include <asm/arch/iomux.h> |
Eric Nelson | afea2ba | 2013-02-19 10:07:01 +0000 | [diff] [blame] | 25 | #include <asm/arch/mx6q_pins.h> |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 26 | #include <asm/errno.h> |
| 27 | #include <asm/gpio.h> |
| 28 | #include <asm/imx-common/iomux-v3.h> |
Otavio Salvador | 5286337 | 2013-03-16 08:05:07 +0000 | [diff] [blame] | 29 | #include <asm/imx-common/boot_mode.h> |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 30 | #include <mmc.h> |
| 31 | #include <fsl_esdhc.h> |
Fabio Estevam | be59b6a | 2012-09-25 08:43:57 +0000 | [diff] [blame] | 32 | #include <miiphy.h> |
| 33 | #include <netdev.h> |
Fabio Estevam | 96ad33d | 2012-10-02 11:20:12 +0000 | [diff] [blame] | 34 | #include <asm/arch/sys_proto.h> |
| 35 | |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 36 | DECLARE_GLOBAL_DATA_PTR; |
| 37 | |
| 38 | #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 39 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 40 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 41 | |
| 42 | #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 43 | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ |
| 44 | PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 45 | |
Fabio Estevam | be59b6a | 2012-09-25 08:43:57 +0000 | [diff] [blame] | 46 | #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 47 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 48 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 49 | |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 50 | int dram_init(void) |
| 51 | { |
| 52 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
Eric Nelson | 1680209 | 2012-10-03 07:26:38 +0000 | [diff] [blame] | 57 | iomux_v3_cfg_t const uart4_pads[] = { |
Eric Nelson | afea2ba | 2013-02-19 10:07:01 +0000 | [diff] [blame] | 58 | MX6_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 59 | MX6_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 60 | }; |
| 61 | |
Eric Nelson | 1680209 | 2012-10-03 07:26:38 +0000 | [diff] [blame] | 62 | iomux_v3_cfg_t const enet_pads[] = { |
Eric Nelson | afea2ba | 2013-02-19 10:07:01 +0000 | [diff] [blame] | 63 | MX6_PAD_KEY_COL1__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 64 | MX6_PAD_KEY_COL2__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 65 | MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 66 | MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 67 | MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 68 | MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 69 | MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 70 | MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 71 | MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 72 | MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 73 | MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 74 | MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 75 | MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 76 | MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 77 | MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), |
Fabio Estevam | be59b6a | 2012-09-25 08:43:57 +0000 | [diff] [blame] | 78 | }; |
| 79 | |
| 80 | static void setup_iomux_enet(void) |
| 81 | { |
| 82 | imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); |
| 83 | } |
| 84 | |
Eric Nelson | 1680209 | 2012-10-03 07:26:38 +0000 | [diff] [blame] | 85 | iomux_v3_cfg_t const usdhc3_pads[] = { |
Eric Nelson | afea2ba | 2013-02-19 10:07:01 +0000 | [diff] [blame] | 86 | MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 87 | MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 88 | MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 89 | MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 90 | MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 91 | MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 92 | MX6_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 93 | MX6_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 94 | MX6_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 95 | MX6_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 96 | MX6_PAD_GPIO_18__USDHC3_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 97 | MX6_PAD_NANDF_CS2__GPIO_6_15 | MUX_PAD_CTRL(NO_PAD_CTRL), |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 98 | }; |
| 99 | |
| 100 | static void setup_iomux_uart(void) |
| 101 | { |
| 102 | imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); |
| 103 | } |
| 104 | |
| 105 | #ifdef CONFIG_FSL_ESDHC |
| 106 | struct fsl_esdhc_cfg usdhc_cfg[1] = { |
| 107 | {USDHC3_BASE_ADDR}, |
| 108 | }; |
| 109 | |
| 110 | int board_mmc_getcd(struct mmc *mmc) |
| 111 | { |
| 112 | gpio_direction_input(IMX_GPIO_NR(6, 15)); |
| 113 | return !gpio_get_value(IMX_GPIO_NR(6, 15)); |
| 114 | } |
| 115 | |
| 116 | int board_mmc_init(bd_t *bis) |
| 117 | { |
| 118 | imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); |
| 119 | |
Benoît Thébaudeau | c58ff34 | 2012-10-01 08:36:25 +0000 | [diff] [blame] | 120 | usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 121 | return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); |
| 122 | } |
| 123 | #endif |
| 124 | |
Fabio Estevam | be59b6a | 2012-09-25 08:43:57 +0000 | [diff] [blame] | 125 | int mx6_rgmii_rework(struct phy_device *phydev) |
| 126 | { |
| 127 | unsigned short val; |
| 128 | |
| 129 | /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ |
| 130 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); |
| 131 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); |
| 132 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); |
| 133 | |
| 134 | val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); |
| 135 | val &= 0xffe3; |
| 136 | val |= 0x18; |
| 137 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); |
| 138 | |
| 139 | /* introduce tx clock delay */ |
| 140 | phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); |
| 141 | val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); |
| 142 | val |= 0x0100; |
| 143 | phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | int board_phy_config(struct phy_device *phydev) |
| 149 | { |
| 150 | mx6_rgmii_rework(phydev); |
| 151 | |
| 152 | if (phydev->drv->config) |
| 153 | phydev->drv->config(phydev); |
| 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | |
| 158 | int board_eth_init(bd_t *bis) |
| 159 | { |
| 160 | int ret; |
| 161 | |
| 162 | setup_iomux_enet(); |
| 163 | |
| 164 | ret = cpu_eth_init(bis); |
| 165 | if (ret) |
| 166 | printf("FEC MXC: %s:failed\n", __func__); |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
Fabio Estevam | 96ad33d | 2012-10-02 11:20:12 +0000 | [diff] [blame] | 171 | #define BOARD_REV_B 0x200 |
| 172 | #define BOARD_REV_A 0x100 |
| 173 | |
| 174 | static int mx6sabre_rev(void) |
| 175 | { |
| 176 | /* |
| 177 | * Get Board ID information from OCOTP_GP1[15:8] |
| 178 | * i.MX6Q ARD RevA: 0x01 |
| 179 | * i.MX6Q ARD RevB: 0x02 |
| 180 | */ |
| 181 | struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; |
| 182 | int reg = readl(&ocotp->gp1); |
| 183 | int ret; |
| 184 | |
| 185 | switch (reg >> 8 & 0x0F) { |
| 186 | case 0x02: |
| 187 | ret = BOARD_REV_B; |
| 188 | break; |
| 189 | case 0x01: |
| 190 | default: |
| 191 | ret = BOARD_REV_A; |
| 192 | break; |
| 193 | } |
| 194 | |
| 195 | return ret; |
| 196 | } |
| 197 | |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 198 | u32 get_board_rev(void) |
| 199 | { |
Fabio Estevam | 96ad33d | 2012-10-02 11:20:12 +0000 | [diff] [blame] | 200 | int rev = mx6sabre_rev(); |
| 201 | |
| 202 | return (get_cpu_rev() & ~(0xF << 8)) | rev; |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 203 | } |
| 204 | |
| 205 | int board_early_init_f(void) |
| 206 | { |
| 207 | setup_iomux_uart(); |
| 208 | |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | int board_init(void) |
| 213 | { |
| 214 | /* address of boot parameters */ |
| 215 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
Otavio Salvador | 5286337 | 2013-03-16 08:05:07 +0000 | [diff] [blame] | 220 | #ifdef CONFIG_CMD_BMODE |
| 221 | static const struct boot_mode board_boot_modes[] = { |
| 222 | /* 4 bit bus width */ |
| 223 | {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, |
| 224 | {NULL, 0}, |
| 225 | }; |
| 226 | #endif |
| 227 | |
| 228 | int board_late_init(void) |
| 229 | { |
| 230 | #ifdef CONFIG_CMD_BMODE |
| 231 | add_board_boot_modes(board_boot_modes); |
| 232 | #endif |
| 233 | |
| 234 | return 0; |
| 235 | } |
| 236 | |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 237 | int checkboard(void) |
| 238 | { |
Fabio Estevam | 96ad33d | 2012-10-02 11:20:12 +0000 | [diff] [blame] | 239 | int rev = mx6sabre_rev(); |
| 240 | char *revname; |
| 241 | |
| 242 | switch (rev) { |
| 243 | case BOARD_REV_B: |
| 244 | revname = "B"; |
| 245 | break; |
| 246 | case BOARD_REV_A: |
| 247 | default: |
| 248 | revname = "A"; |
| 249 | break; |
| 250 | } |
| 251 | |
| 252 | printf("Board: MX6Q-Sabreauto rev%s\n", revname); |
Fabio Estevam | afe20bf | 2012-09-24 08:09:33 +0000 | [diff] [blame] | 253 | |
| 254 | return 0; |
| 255 | } |