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git01.mediatek.com / filogic / uboot / 5270bde6bb3af9eef494063b03c5d8f1260a961d / . / board / freescale / mx23evk / spl_boot.c
blob: b6f4e7eff2e47221328d2982a5a5d0d4c6b5597d [file] [log] [blame]
Otavio Salvador50e60902013-01-23 10:30:34 +0000[diff] [blame]1/*
2 * Freescale MX23EVK Boot setup
3 *
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 * on behalf of DENX Software Engineering GmbH
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20
21#include <common.h>
22#include <config.h>
23#include <asm/io.h>
24#include <asm/arch/iomux-mx23.h>
25#include <asm/arch/imx-regs.h>
26#include <asm/arch/sys_proto.h>
27
28#define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
29#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_16MA | MXS_PAD_PULLUP)
30
31const iomux_cfg_t iomux_setup[] = {
32 /* DUART */
33 MX23_PAD_PWM0__DUART_RX,
34 MX23_PAD_PWM1__DUART_TX,
35
36 /* EMI */
37 MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
38 MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
39 MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
40 MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
41 MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
42 MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
43 MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
44 MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
45 MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
46 MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
47 MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
48 MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
49 MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
50 MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
51 MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
52 MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
53 MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
54 MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
55 MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
56 MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
57 MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
58 MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
59
60 MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
61 MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
62 MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
63 MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
64 MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
65 MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
66 MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
67 MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
68 MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
69 MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
70 MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
71 MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
72 MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
73 MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
74 MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
75
76 MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
77 MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
78 MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
79 MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
80 MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
81 MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
82
83 /* MMC 0 */
84 MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP1,
85 MX23_PAD_SSP1_DATA1__SSP1_DATA1 | MUX_CONFIG_SSP1,
86 MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP1,
87 MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP1,
88 MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP1,
89 MX23_PAD_SSP1_DETECT__SSP1_DETECT | MUX_CONFIG_SSP1,
90 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
91 MX23_PAD_SSP1_SCK__SSP1_SCK |
92 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
93 /* Write Protect Pin */
94 MX23_PAD_PWM4__GPIO_1_30 |
95 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
96 /* Slot Power Enable */
97 MX23_PAD_PWM3__GPIO_1_29 |
98 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
99};
100
Otavio Salvador39dffa62013-02-23 02:43:06 +0000[diff] [blame]101#define HW_DRAM_CTL14 (0x38 >> 2)
102#define CS_MAP 0x3
103#define INTAREF 0x2
104#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP)
105
106void mxs_adjust_memory_params(uint32_t *dram_vals)
107{
108 dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG;
109}
110
Otavio Salvador50e60902013-01-23 10:30:34 +0000[diff] [blame]111void board_init_ll(void)
112{
113 mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
114}