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Mike Frysinger94bae5c2008-03-30 15:46:13 -04001/*
2 * U-boot - start.S Startup file for Blackfin u-boot
3 *
Mike Frysingerb96abbe2008-10-11 21:18:10 -04004 * Copyright (c) 2005-2008 Analog Devices Inc.
Mike Frysinger94bae5c2008-03-30 15:46:13 -04005 *
6 * This file is based on head.S
7 * Copyright (c) 2003 Metrowerks/Motorola
8 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * The Silver Hammer Group, Ltd.
11 * (c) 1995, Dionne & Associates
12 * (c) 1995, DKG Display Tech.
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
30 * MA 02110-1301 USA
31 */
32
33#include <config.h>
34#include <asm/blackfin.h>
35#include <asm/mach-common/bits/core.h>
36#include <asm/mach-common/bits/dma.h>
37#include <asm/mach-common/bits/pll.h>
38
39#include "serial.h"
40
41/* It may seem odd that we make calls to functions even though we haven't
42 * relocated ourselves yet out of {flash,ram,wherever}. This is OK because
43 * the "call" instruction in the Blackfin architecture is actually PC
44 * relative. So we can call functions all we want and not worry about them
45 * not being relocated yet.
46 */
47
48.text
49ENTRY(_start)
50
51 /* Set our initial stack to L1 scratch space */
Mike Frysingerb96abbe2008-10-11 21:18:10 -040052 sp.l = LO(L1_SRAM_SCRATCH_END - 20);
53 sp.h = HI(L1_SRAM_SCRATCH_END - 20);
Mike Frysinger94bae5c2008-03-30 15:46:13 -040054
55#ifdef CONFIG_HW_WATCHDOG
56# ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
57# define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
58# endif
59 /* Program the watchdog with an initial timeout of ~5 seconds.
60 * That should be long enough to bootstrap ourselves up and
61 * then the common u-boot code can take over.
62 */
63 P0.L = LO(WDOG_CNT);
64 P0.H = HI(WDOG_CNT);
65 R0.L = 0;
66 R0.H = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START));
67 [P0] = R0;
68 /* fire up the watchdog - R0.L above needs to be 0x0000 */
69 W[P0 + (WDOG_CTL - WDOG_CNT)] = R0;
70#endif
71
72 /* Turn on the serial for debugging the init process */
73 serial_early_init
74 serial_early_set_baud
75
76 serial_early_puts("Init Registers");
77
Mike Frysinger5570cec2008-06-01 01:23:48 -040078 /* Disable self-nested interrupts and enable CYCLES for udelay() */
Mike Frysinger94bae5c2008-03-30 15:46:13 -040079 R0 = CCEN | 0x30;
80 SYSCFG = R0;
81
82 /* Zero out registers required by Blackfin ABI.
83 * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
84 */
85 r1 = 0 (x);
86 /* Disable circular buffers */
87 l0 = r1;
88 l1 = r1;
89 l2 = r1;
90 l3 = r1;
91 /* Disable hardware loops in case we were started by 'go' */
92 lc0 = r1;
93 lc1 = r1;
94
95 /* Save RETX so we can pass it while booting Linux */
96 r7 = RETX;
97
Mike Frysinger268dbf52008-10-11 21:58:33 -040098 /* Figure out where we are currently executing so that we can decide
99 * how to best reprogram and relocate things. We'll pass below:
100 * R4: load address of _start
101 * R5: current (not load) address of _start
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400102 */
Mike Frysinger268dbf52008-10-11 21:58:33 -0400103 serial_early_puts("Find ourselves");
104
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400105 call _get_pc;
Mike Frysinger268dbf52008-10-11 21:58:33 -0400106.Loffset:
107 r1.l = .Loffset;
108 r1.h = .Loffset;
109 r4.l = _start;
110 r4.h = _start;
111 r3 = r1 - r4;
112 r5 = r0 - r3;
113
114 /* Inform upper layers if we had to do the relocation ourselves.
115 * This allows us to detect whether we were loaded by 'go 0x1000'
116 * or by the bootrom from an LDR. "R6" is "loaded_from_ldr".
117 */
118 r6 = 1 (x);
119 cc = r4 == r5;
120 if cc jump .Lnorelocate;
121 r6 = 0 (x);
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400122
Mike Frysinger268dbf52008-10-11 21:58:33 -0400123 /* In bypass mode, we don't have an LDR with an init block
124 * so we need to explicitly call it ourselves. This will
125 * reprogram our clocks, memory, and setup our async banks.
126 */
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400127 serial_early_puts("Program Clocks");
128
Mike Frysinger268dbf52008-10-11 21:58:33 -0400129 /* if we're executing >=0x20000000, then we dont need to dma */
130 r3 = 0x0;
131 r3.h = 0x2000;
132 cc = r5 < r3 (iu);
133 if cc jump .Ldma_and_reprogram;
Mike Frysinger01986762009-02-13 17:10:58 -0500134 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400135 call _initcode;
Mike Frysinger268dbf52008-10-11 21:58:33 -0400136 jump .Lprogrammed;
137
138 /* we're sitting in external memory, so dma into L1 and reprogram */
139.Ldma_and_reprogram:
140 r0.l = LO(L1_INST_SRAM);
141 r0.h = HI(L1_INST_SRAM);
142 r1.l = __initcode_start;
143 r1.h = __initcode_start;
144 r2.l = __initcode_end;
145 r2.h = __initcode_end;
146 r2 = r2 - r1; /* convert r2 into length of initcode */
147 r1 = r1 - r4; /* convert r1 from load address of initcode ... */
148 r1 = r1 + r5; /* ... to current (not load) address of initcode */
149 p3 = r0;
150 call _dma_memcpy_nocache;
Mike Frysinger01986762009-02-13 17:10:58 -0500151 r0 = 0 (x); /* set bootstruct to NULL */
Mike Frysinger268dbf52008-10-11 21:58:33 -0400152 call (p3);
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400153
154 /* Since we reprogrammed SCLK, we need to update the serial divisor */
Mike Frysinger268dbf52008-10-11 21:58:33 -0400155.Lprogrammed:
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400156 serial_early_set_baud
157
Mike Frysingerc1e729f2008-10-11 21:40:26 -0400158 /* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded
Mike Frysinger28bd0af2008-06-01 01:21:34 -0400159 * monitor location in the end of RAM. We know that memcpy() only
Mike Frysingerc1e729f2008-10-11 21:40:26 -0400160 * uses registers, so it is safe to call here. Note that this only
161 * copies to external memory ... we do not start executing out of
162 * it yet (see "lower to 15" below).
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400163 */
164 serial_early_puts("Relocate");
Mike Frysinger268dbf52008-10-11 21:58:33 -0400165 r0 = r4;
166 r1 = r5;
Mike Frysinger28bd0af2008-06-01 01:21:34 -0400167 r2.l = LO(CONFIG_SYS_MONITOR_LEN);
168 r2.h = HI(CONFIG_SYS_MONITOR_LEN);
169 call _memcpy_ASM;
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400170
171 /* Initialize BSS section ... we know that memset() does not
172 * use the BSS, so it is safe to call here. The bootrom LDR
173 * takes care of clearing things for us.
174 */
175 serial_early_puts("Zero BSS");
176 r0.l = __bss_start;
177 r0.h = __bss_start;
178 r1 = 0 (x);
179 r2.l = __bss_end;
180 r2.h = __bss_end;
181 r2 = r2 - r0;
182 call _memset;
183
184.Lnorelocate:
185
186 /* Setup the actual stack in external memory */
Mike Frysingerb7bd0cf2008-10-11 21:23:41 -0400187 sp.h = HI(CONFIG_STACKBASE);
188 sp.l = LO(CONFIG_STACKBASE);
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400189 fp = sp;
190
191 /* Now lower ourselves from the highest interrupt level to
192 * the lowest. We do this by masking all interrupts but 15,
Mike Frysinger5570cec2008-06-01 01:23:48 -0400193 * setting the 15 handler to ".Lenable_nested", raising the 15
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400194 * interrupt, and then returning from the highest interrupt
195 * level to the dummy "jump" until the interrupt controller
Mike Frysingerc1e729f2008-10-11 21:40:26 -0400196 * services the pending 15 interrupt. If executing out of
197 * flash, these steps also changes the code flow from flash
198 * to external memory.
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400199 */
200 serial_early_puts("Lower to 15");
201 r0 = r7;
202 r1 = r6;
203 p0.l = LO(EVT15);
204 p0.h = HI(EVT15);
Mike Frysinger5570cec2008-06-01 01:23:48 -0400205 p1.l = .Lenable_nested;
206 p1.h = .Lenable_nested;
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400207 [p0] = p1;
Mike Frysinger43218c62008-10-11 21:19:39 -0400208 r7 = EVT_IVG15 (z);
209 sti r7;
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400210 raise 15;
211 p4.l = .LWAIT_HERE;
212 p4.h = .LWAIT_HERE;
213 reti = p4;
214 rti;
215
Mike Frysinger5570cec2008-06-01 01:23:48 -0400216 /* Enable nested interrupts before continuing with cpu init */
217.Lenable_nested:
218 cli r7;
219 [--sp] = reti;
220 jump.l _cpu_init_f;
221
Mike Frysinger94bae5c2008-03-30 15:46:13 -0400222.LWAIT_HERE:
223 jump .LWAIT_HERE;
224ENDPROC(_start)
225
226LENTRY(_get_pc)
227 r0 = rets;
228#if ANOMALY_05000371
229 NOP;
230 NOP;
231 NOP;
232#endif
233 rts;
234ENDPROC(_get_pc)