| Paul Burton | a31a3df | 2016-05-17 07:43:28 +0100 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | /memreserve/ 0x00000000 0x00001000; /* Exception vectors */ |
| 4 | /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */ |
| 5 | |
| 6 | / { |
| 7 | #address-cells = <1>; |
| 8 | #size-cells = <1>; |
| 9 | compatible = "mti,malta"; |
| 10 | |
| 11 | chosen { |
| 12 | stdout-path = &uart0; |
| 13 | }; |
| 14 | |
| 15 | isa@0 { |
| 16 | compatible = "isa"; |
| 17 | #address-cells = <2>; |
| 18 | #size-cells = <1>; |
| 19 | ranges = <1 0 0 0x1000>; |
| 20 | |
| 21 | uart0: serial@3f8 { |
| 22 | compatible = "ns16550a"; |
| 23 | |
| 24 | reg = <1 0x3f8 0x40>; |
| 25 | reg-shift = <0>; |
| 26 | |
| 27 | clock-frequency = <1843200>; |
| 28 | |
| 29 | u-boot,dm-pre-reloc; |
| 30 | }; |
| 31 | }; |
| Daniel Schwierzeck | 01972f1 | 2021-07-15 20:53:59 +0200 | [diff] [blame] | 32 | |
| 33 | pci0@1bd00000 { |
| 34 | compatible = "mips,pci-msc01"; |
| 35 | device_type = "pci"; |
| 36 | reg = <0x1bd00000 0x2000>; |
| 37 | |
| 38 | #address-cells = <3>; |
| 39 | #size-cells = <2>; |
| 40 | bus-range = <0x0 0x0>; |
| 41 | ranges = <0x01000000 0 0x00000000 0x00000000 0 0x800000 /* I/O */ |
| 42 | 0x02000000 0 0x10000000 0xb0000000 0 0x10000000 /* MEM */>; |
| 43 | |
| 44 | status = "disabled"; |
| 45 | }; |
| 46 | |
| 47 | pci0@1be00000 { |
| 48 | compatible = "marvell,pci-gt64120"; |
| 49 | device_type = "pci"; |
| 50 | reg = <0x1be00000 0x2000>; |
| 51 | |
| 52 | #address-cells = <3>; |
| 53 | #size-cells = <2>; |
| 54 | bus-range = <0x0 0x0>; |
| 55 | ranges = <0x01000000 0 0x00000000 0x00000000 0 0x20000 /* I/O */ |
| 56 | 0x02000000 0 0x10000000 0x10000000 0 0x8000000 /* MEM */>; |
| 57 | |
| 58 | status = "okay"; |
| 59 | }; |
| Paul Burton | a31a3df | 2016-05-17 07:43:28 +0100 | [diff] [blame] | 60 | }; |