blob: 706a5cde01acdac349b13b6aebc6e16e2508ecbd [file] [log] [blame]
Kevin Scholz521a4ef2019-10-07 19:26:36 +05301/* SPDX-License-Identifier: BSD-3-Clause */
2/******************************************************************************
3 *
4 * Copyright (C) 2017-2018 Cadence Design Systems, Inc.
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
6 *
7 * cps_drv_lpddr4.h
8 * Interface for the Register Accaess Layer of Cadence Platform Service (CPS)
9 *****************************************************************************
10 */
11
12#ifndef CPS_DRV_H_
13#define CPS_DRV_H_
14
15#include <stddef.h>
16#include <inttypes.h>
17#include <asm/io.h>
18
19/**
20 * \brief Read a 32-bit value from memory.
21 * \param reg address of the memory mapped hardware register
22 * \return the value at the given address
23 */
24#define CPS_REG_READ(reg) (readl((volatile uint32_t*)(reg)))
25
26/**
27 * \brief Write a 32-bit address value to memory.
28 * \param reg address of the memory mapped hardware register
29 * \param value unsigned 32-bit value to write
30 */
31#define CPS_REG_WRITE(reg, value) (writel((uint32_t)(value), (volatile uint32_t*)(reg)))
32
33/**
34 * \brief Subtitue the value of fld macro and concatinate with required string
35 * \param fld field name
36 */
37#define CPS_FLD_MASK(fld) (fld ## _MASK)
38#define CPS_FLD_SHIFT(fld) (fld ## _SHIFT)
39#define CPS_FLD_WIDTH(fld) (fld ## _WIDTH)
40#define CPS_FLD_WOCLR(fld) (fld ## _WOCLR)
41#define CPS_FLD_WOSET(fld) (fld ## _WOSET)
42
43/**
44 * \brief Read a value of bit-field from the register value.
45 * \param reg register name
46 * \param fld field name
47 * \param reg_value register value
48 * \return bit-field value
49 */
50#define CPS_FLD_READ(fld, reg_value) (cps_fldread((uint32_t)(CPS_FLD_MASK(fld)), \
51 (uint32_t)(CPS_FLD_SHIFT(fld)), \
52 (uint32_t)(reg_value)))
53
54/**
55 * \brief Write a value of the bit-field into the register value.
56 * \param reg register name
57 * \param fld field name
58 * \param reg_value register value
59 * \param value value to be written to bit-field
60 * \return modified register value
61 */
62#define CPS_FLD_WRITE(fld, reg_value, value) (cps_fldwrite((uint32_t)(CPS_FLD_MASK(fld)), \
63 (uint32_t)(CPS_FLD_SHIFT(fld)), \
64 (uint32_t)(reg_value), (uint32_t)(value)))
65
66/**
67 * \brief Set bit within the register value.
68 * \param reg register name
69 * \param fld field name
70 * \param reg_value register value
71 * \return modified register value
72 */
73#define CPS_FLD_SET(fld, reg_value) (cps_fldset((uint32_t)(CPS_FLD_WIDTH(fld)), \
74 (uint32_t)(CPS_FLD_MASK(fld)), \
75 (uint32_t)(CPS_FLD_WOCLR(fld)), \
76 (uint32_t)(reg_value)))
77
78static inline uint32_t cps_fldread(uint32_t mask, uint32_t shift, uint32_t reg_value)
79{
80 uint32_t result = (reg_value & mask) >> shift;
81
82 return (result);
83}
84
85/**
86 * \brief Write a value of the bit-field into the register value.
87 * \param mask mask for the bit-field
88 * \param shift bit-field shift from LSB
89 * \param reg_value register value
90 * \param value value to be written to bit-field
91 * \return modified register value
92 */
93static inline uint32_t cps_fldwrite(uint32_t mask, uint32_t shift, uint32_t reg_value, uint32_t value)
94{
95 uint32_t new_value = (value << shift) & mask;
96
97 new_value = (reg_value & ~mask) | new_value;
98 return (new_value);
99}
100
101/**
102 * \brief Set bit within the register value.
103 * \param width width of the bit-field
104 * \param mask mask for the bit-field
105 * \param is_woclr is bit-field has 'write one to clear' flag set
106 * \param reg_value register value
107 * \return modified register value
108 */
109static inline uint32_t cps_fldset(uint32_t width, uint32_t mask, uint32_t is_woclr, uint32_t reg_value)
110{
111 uint32_t new_value = reg_value;
112 /* Confirm the field to be bit and not write to clear type */
113 if ((width == 1U) && (is_woclr == 0U)) {
114 new_value |= mask;
115 }
116
117 return (new_value);
118}
119#endif /* CPS_DRV_H_ */