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git01.mediatek.com / filogic / uboot / 51f70c1f520becbfd4a6192506207366348d931b / . / arch / arm / dts / tegra30-asus-nexus7-tilapia-E1565.dts
blob: 3f0dff8fe6544331b1e220f869ea9e5c36a1954a [file] [log] [blame]
Svyatoslav Ryhel88fd1562023-06-30 10:29:04 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "tegra30-asus-grouper-common.dtsi"
5
6/ {
7 model = "ASUS Google Nexus 7 (Project Bach / ME370TG) E1565";
8 compatible = "asus,tilapia", "nvidia,tegra30";
9
Svyatoslav Ryhel51f70c12023-11-27 18:16:50 +0200[diff] [blame^]10 pinmux@70000868 {
11 state_default: pinmux {
12 lcd_dc1_pd2 {
13 nvidia,pins = "lcd_dc1_pd2";
14 nvidia,function = "displaya";
15 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
16 nvidia,tristate = <TEGRA_PIN_DISABLE>;
17 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
18 };
19 lcd_pwr2_pc6 {
20 nvidia,pins = "lcd_pwr2_pc6";
21 nvidia,function = "displaya";
22 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
23 nvidia,tristate = <TEGRA_PIN_DISABLE>;
24 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
25 };
26 spi2_cs2_n_pw3 {
27 nvidia,pins = "spi2_cs2_n_pw3";
28 nvidia,function = "spi2";
29 nvidia,pull = <TEGRA_PIN_PULL_UP>;
30 nvidia,tristate = <TEGRA_PIN_DISABLE>;
31 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
32 };
33 dap3_din_pp1 {
34 nvidia,pins = "dap3_din_pp1";
35 nvidia,function = "i2s2";
36 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
37 nvidia,tristate = <TEGRA_PIN_DISABLE>;
38 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
39 };
40 spi1_sck_px5 {
41 nvidia,pins = "spi1_sck_px5";
42 nvidia,function = "spi1";
43 nvidia,pull = <TEGRA_PIN_PULL_UP>;
44 nvidia,tristate = <TEGRA_PIN_DISABLE>;
45 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
46 };
47 pu5 {
48 nvidia,pins = "pu5";
49 nvidia,function = "pwm2";
50 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
51 nvidia,tristate = <TEGRA_PIN_DISABLE>;
52 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
53 };
54 spi1_miso_px7 {
55 nvidia,pins = "spi1_miso_px7";
56 nvidia,function = "spi1";
57 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
58 nvidia,tristate = <TEGRA_PIN_DISABLE>;
59 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
60 };
61 spi2_mosi_px0 {
62 nvidia,pins = "spi2_mosi_px0";
63 nvidia,function = "spi2";
64 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
65 nvidia,tristate = <TEGRA_PIN_DISABLE>;
66 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
67 };
68 clk3_req_pee1 {
69 nvidia,pins = "clk3_req_pee1";
70 nvidia,function = "dev3";
71 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
72 nvidia,tristate = <TEGRA_PIN_DISABLE>;
73 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
74 };
75 ulpi_nxt_py2 {
76 nvidia,pins = "ulpi_nxt_py2";
77 nvidia,function = "uartd";
78 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
79 nvidia,tristate = <TEGRA_PIN_DISABLE>;
80 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
81 };
82 ulpi_stp_py3 {
83 nvidia,pins = "ulpi_stp_py3";
84 nvidia,function = "uartd";
85 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
86 nvidia,tristate = <TEGRA_PIN_DISABLE>;
87 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
88 };
89 kb_row7_pr7 {
90 nvidia,pins = "kb_row7_pr7";
91 nvidia,function = "kbc";
92 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
93 nvidia,tristate = <TEGRA_PIN_DISABLE>;
94 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
95 };
96 pu4 {
97 nvidia,pins = "pu4";
98 nvidia,function = "pwm1";
99 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
101 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
102 };
103 pu3 {
104 nvidia,pins = "pu3";
105 nvidia,function = "rsvd4";
106 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
108 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
109 };
110 kb_row15_ps7 {
111 nvidia,pins = "kb_row15_ps7";
112 nvidia,function = "kbc";
113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116 };
117 dap3_sclk_pp3 {
118 nvidia,pins = "dap3_sclk_pp3";
119 nvidia,function = "i2s2";
120 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
121 nvidia,tristate = <TEGRA_PIN_DISABLE>;
122 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
123 };
124 kb_row3_pr3 {
125 nvidia,pins = "kb_row3_pr3",
126 "kb_row13_ps5";
127 nvidia,function = "kbc";
128 nvidia,pull = <TEGRA_PIN_PULL_UP>;
129 nvidia,tristate = <TEGRA_PIN_DISABLE>;
130 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
131 };
132 kb_row13_ps5 {
133 nvidia,pins = "kb_row13_ps5";
134 nvidia,function = "kbc";
135 nvidia,pull = <TEGRA_PIN_PULL_UP>;
136 nvidia,tristate = <TEGRA_PIN_DISABLE>;
137 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
138 };
139 gmi_wp_n_pc7 {
140 nvidia,pins = "gmi_wp_n_pc7",
141 "gmi_wait_pi7",
142 "gmi_cs4_n_pk2",
143 "gmi_cs3_n_pk4";
144 nvidia,function = "rsvd1";
145 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146 nvidia,tristate = <TEGRA_PIN_ENABLE>;
147 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
148 };
149 gmi_cs6_n_pi3 {
150 nvidia,pins = "gmi_cs6_n_pi3";
151 nvidia,function = "gmi";
152 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153 nvidia,tristate = <TEGRA_PIN_ENABLE>;
154 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
155 };
156 };
157 };
158
Svyatoslav Ryhel88fd1562023-06-30 10:29:04 +0300[diff] [blame]159 i2c@7000d000 {
160 pmic: max77663@3c {
161 compatible = "maxim,max77663";
162 reg = <0x3c>;
163
164 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
165 #interrupt-cells = <2>;
166 interrupt-controller;
167
168 system-power-controller;
169
170 #gpio-cells = <2>;
171 gpio-controller;
172
173 regulators {
Svyatoslav Ryhelcaa4a462023-10-03 09:36:41 +0300[diff] [blame]174 vdd_1v8_vio: sd2 {
Svyatoslav Ryhel88fd1562023-06-30 10:29:04 +0300[diff] [blame]175 regulator-name = "vdd_1v8_gen";
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <1800000>;
178 regulator-always-on;
179 regulator-boot-on;
180 };
181
182 /* eMMC VDD */
183 vcore_emmc: ldo3 {
184 regulator-name = "vcore_emmc";
185 regulator-min-microvolt = <2850000>;
Svyatoslav Ryhelcaa4a462023-10-03 09:36:41 +0300[diff] [blame]186 regulator-max-microvolt = <2850000>;
Svyatoslav Ryhel193e9482023-08-26 18:46:27 +0300[diff] [blame]187 regulator-boot-on;
Svyatoslav Ryhel88fd1562023-06-30 10:29:04 +0300[diff] [blame]188 };
189 };
190 };
191 };
192
193 panel {
194 display-timings {
195 timing@0 {
196 /* 1280x800@60Hz */
197 clock-frequency = <81750000>;
198
199 hactive = <800>;
200 hfront-porch = <64>;
201 hback-porch = <128>;
202 hsync-len = <64>;
203
204 vactive = <1280>;
205 vfront-porch = <5>;
206 vback-porch = <2>;
207 vsync-len = <1>;
208 };
209 };
210 };
211};