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git01.mediatek.com / filogic / uboot / 51e7778ad9737d7e6a1f71148caaad0e2f7eca1c / . / board / nx823 / u-boot.lds
blob: a1481c869912f916196142323f815644b0ea0ab5 [file] [log] [blame]
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]1/*
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]2 * (C) Copyright 2001-2010
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]25
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]26SECTIONS
27{
28 /* Read-only sections, merged into text segment: */
29 . = + SIZEOF_HEADERS;
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]30 .text :
31 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]32 arch/powerpc/cpu/mpc8xx/start.o (.text*)
33 arch/powerpc/cpu/mpc8xx/traps.o (.text*)
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]34
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]35 *(.text*)
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]36 }
37 _etext = .;
38 PROVIDE (etext = .);
39 .rodata :
40 {
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]41 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]42 }
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]43
44 /* Read-write section, merged into data segment: */
45 . = (. + 0x00FF) & 0xFFFFFF00;
46 _erotext = .;
47 PROVIDE (erotext = .);
48 .reloc :
49 {
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]50 _GOT2_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]51 KEEP(*(.got2))
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]52 KEEP(*(.got))
53 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]54 _FIXUP_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]55 KEEP(*(.fixup))
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]56 }
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]57 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]58 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
59
60 .data :
61 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]62 *(.data*)
63 *(.sdata*)
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]64 }
65 _edata = .;
66 PROVIDE (edata = .);
67
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]68 . = .;
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]69
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]70 . = ALIGN(4);
71 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]72 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]73 }
74
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]75
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]76 . = .;
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]77 __start___ex_table = .;
78 __ex_table : { *(__ex_table) }
79 __stop___ex_table = .;
80
81 . = ALIGN(256);
82 __init_begin = .;
83 .text.init : { *(.text.init) }
84 .data.init : { *(.data.init) }
85 . = ALIGN(256);
86 __init_end = .;
87
88 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]89 .bss (NOLOAD) :
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]90 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]91 *(.bss*)
92 *(.sbss*)
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]93 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]94 . = ALIGN(4);
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]95 }
Simon Glassed70c8f2013-03-14 06:54:53 +0000[diff] [blame]96 __bss_end = . ;
wdenk012771d2002-03-08 21:31:05 +0000[diff] [blame]97 PROVIDE (end = .);
98}