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Jagan Teki0d6d48b2016-10-08 18:00:11 +05301/*
2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
4 *
5 * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __IMX6QLD_ICORE_CONFIG_H
11#define __IMX6QLD_ICORE_CONFIG_H
12
13#include <linux/sizes.h>
14#include "mx6_common.h"
15
16/* Size of malloc() pool */
17#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
18
19/* Total Size of Environment Sector */
20#define CONFIG_ENV_SIZE SZ_128K
21
22/* Allow to overwrite serial and ethaddr */
23#define CONFIG_ENV_OVERWRITE
24
25/* Environment */
26#ifndef CONFIG_ENV_IS_NOWHERE
27/* Environment in MMC */
28# if defined(CONFIG_ENV_IS_IN_MMC)
29# define CONFIG_ENV_OFFSET 0x100000
Jagan Teki0313c132016-10-25 11:53:23 +053030/* Environment in NAND */
31# elif defined(CONFIG_ENV_IS_IN_NAND)
32# define CONFIG_ENV_OFFSET 0x400000
33# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
Jagan Teki0d6d48b2016-10-08 18:00:11 +053034# endif
35#endif
36
37/* Default environment */
38#define CONFIG_EXTRA_ENV_SETTINGS \
39 "script=boot.scr\0" \
40 "image=zImage\0" \
41 "console=ttymxc3\0" \
42 "fdt_high=0xffffffff\0" \
43 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
44 "fdt_addr=0x18000000\0" \
45 "boot_fdt=try\0" \
46 "mmcdev=0\0" \
47 "mmcpart=1\0" \
48 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
49 "mmcautodetect=yes\0" \
50 "mmcargs=setenv bootargs console=${console},${baudrate} " \
51 "root=${mmcroot}\0" \
52 "loadbootscript=" \
53 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
54 "bootscript=echo Running bootscript from mmc ...; " \
55 "source\0" \
56 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
57 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
58 "mmcboot=echo Booting from mmc ...; " \
59 "run mmcargs; " \
60 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
61 "if run loadfdt; then " \
62 "bootz ${loadaddr} - ${fdt_addr}; " \
63 "else " \
64 "if test ${boot_fdt} = try; then " \
65 "bootz; " \
66 "else " \
67 "echo WARN: Cannot load the DT; " \
68 "fi; " \
69 "fi; " \
70 "else " \
71 "bootz; " \
72 "fi\0"
73
74#define CONFIG_BOOTCOMMAND \
75 "mmc dev ${mmcdev};" \
76 "mmc dev ${mmcdev}; if mmc rescan; then " \
77 "if run loadbootscript; then " \
78 "run bootscript; " \
79 "else " \
80 "if run loadimage; then " \
81 "run mmcboot; " \
82 "fi; " \
83 "fi; " \
84 "fi"
85
86/* Miscellaneous configurable options */
87#define CONFIG_SYS_MEMTEST_START 0x80000000
88#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
89
90#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
91#define CONFIG_SYS_HZ 1000
92
93/* Physical Memory Map */
94#define CONFIG_NR_DRAM_BANKS 1
95#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
96
97#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
98#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
99#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
100
101#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
102 GENERATED_GBL_DATA_SIZE)
103#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
104 CONFIG_SYS_INIT_SP_OFFSET)
105
106/* UART */
107#ifdef CONFIG_MXC_UART
108# define CONFIG_MXC_UART_BASE UART4_BASE
109#endif
110
111/* MMC */
112#ifdef CONFIG_FSL_USDHC
113# define CONFIG_SYS_MMC_ENV_DEV 0
114# define CONFIG_SYS_FSL_USDHC_NUM 1
115# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
116#endif
117
Jagan Teki0313c132016-10-25 11:53:23 +0530118/* NAND */
119#ifdef CONFIG_NAND_MXS
120# define CONFIG_SYS_MAX_NAND_DEVICE 1
121# define CONFIG_SYS_NAND_BASE 0x40000000
122# define CONFIG_SYS_NAND_5_ADDR_CYCLE
123# define CONFIG_SYS_NAND_ONFI_DETECTION
124# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
125# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
126
Jagan Teki51d7a532016-10-08 18:00:27 +0530127/* MTD device */
128# define CONFIG_MTD_DEVICE
129# define CONFIG_CMD_MTDPARTS
130# define CONFIG_MTD_PARTITIONS
131# define MTDIDS_DEFAULT "nand0=nand"
132
Jagan Teki0313c132016-10-25 11:53:23 +0530133# define CONFIG_APBH_DMA
134# define CONFIG_APBH_DMA_BURST
135# define CONFIG_APBH_DMA_BURST8
136#endif
137
Jagan Teki12c8e2d2016-10-08 18:00:13 +0530138/* Ethernet */
139#ifdef CONFIG_FEC_MXC
140# define IMX_FEC_BASE ENET_BASE_ADDR
141# define CONFIG_FEC_MXC_PHYADDR 0
142# define CONFIG_FEC_XCV_TYPE RMII
143# define CONFIG_ETHPRIME "FEC"
144
145# define CONFIG_MII
146# define CONFIG_PHYLIB
147# define CONFIG_PHY_SMSC
148#endif
149
Jagan Teki0d6d48b2016-10-08 18:00:11 +0530150/* SPL */
151#ifdef CONFIG_SPL
Jagan Teki0313c132016-10-25 11:53:23 +0530152# ifdef CONFIG_NAND_MXS
153# define CONFIG_SPL_NAND_SUPPORT
154# else
155# define CONFIG_SPL_MMC_SUPPORT
156# endif
157
Jagan Teki0d6d48b2016-10-08 18:00:11 +0530158# include "imx6_spl.h"
Jagan Tekid57960f2016-10-25 11:53:22 +0530159# ifdef CONFIG_SPL_BUILD
160# undef CONFIG_DM_GPIO
161# undef CONFIG_DM_MMC
162# endif
Jagan Teki0d6d48b2016-10-08 18:00:11 +0530163#endif
164
165#endif /* __IMX6QLD_ICORE_CONFIG_H */