| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 2 | /* |
| Yusuke Goda | 54cda8b | 2008-03-05 14:23:26 +0900 | [diff] [blame] | 3 | * (C) Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 4 | */ |
| 5 | |
| Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 6 | #ifndef _ASM_CPU_SH4_H_ |
| 7 | #define _ASM_CPU_SH4_H_ |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 8 | |
| 9 | /* cache control */ |
| 10 | #define CCR_CACHE_STOP 0x00000808 |
| 11 | #define CCR_CACHE_ENABLE 0x00000101 |
| 12 | #define CCR_CACHE_ICI 0x00000800 |
| 13 | |
| 14 | #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 |
| Nobuhiro Iwamatsu | 121e2c5 | 2008-11-25 11:05:19 +0900 | [diff] [blame] | 15 | |
| 16 | #if defined (CONFIG_CPU_SH7750) || \ |
| 17 | defined(CONFIG_CPU_SH7751) |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 18 | #define CACHE_OC_WAY_SHIFT 14 |
| 19 | #define CACHE_OC_NUM_ENTRIES 512 |
| Nobuhiro Iwamatsu | 121e2c5 | 2008-11-25 11:05:19 +0900 | [diff] [blame] | 20 | #else |
| 21 | #define CACHE_OC_WAY_SHIFT 13 |
| 22 | #define CACHE_OC_NUM_ENTRIES 256 |
| 23 | #endif |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 24 | #define CACHE_OC_ENTRY_SHIFT 5 |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 25 | |
| Nobuhiro Iwamatsu | 53b3143 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 26 | #if defined (CONFIG_CPU_SH7750) || \ |
| 27 | defined(CONFIG_CPU_SH7751) |
| 28 | # include <asm/cpu_sh7750.h> |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 29 | #elif defined (CONFIG_CPU_SH7722) |
| Nobuhiro Iwamatsu | 53b3143 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 30 | # include <asm/cpu_sh7722.h> |
| Nobuhiro Iwamatsu | fcabccc | 2008-08-22 17:48:51 +0900 | [diff] [blame] | 31 | #elif defined (CONFIG_CPU_SH7723) |
| 32 | # include <asm/cpu_sh7723.h> |
| Nobuhiro Iwamatsu | 73bbe6d | 2012-01-11 10:45:01 +0900 | [diff] [blame] | 33 | #elif defined (CONFIG_CPU_SH7734) |
| 34 | # include <asm/cpu_sh7734.h> |
| Yoshihiro Shimoda | 07fecef | 2012-11-04 15:53:22 +0000 | [diff] [blame] | 35 | #elif defined (CONFIG_CPU_SH7752) |
| 36 | # include <asm/cpu_sh7752.h> |
| Yoshihiro Shimoda | 95abe5f | 2013-12-18 16:03:44 +0900 | [diff] [blame] | 37 | #elif defined (CONFIG_CPU_SH7753) |
| 38 | # include <asm/cpu_sh7753.h> |
| Yoshihiro Shimoda | a7d382c | 2011-02-02 10:05:36 +0900 | [diff] [blame] | 39 | #elif defined (CONFIG_CPU_SH7757) |
| 40 | # include <asm/cpu_sh7757.h> |
| Nobuhiro Iwamatsu | 6b165de | 2008-06-06 16:24:13 +0900 | [diff] [blame] | 41 | #elif defined (CONFIG_CPU_SH7763) |
| 42 | # include <asm/cpu_sh7763.h> |
| Yusuke Goda | 54cda8b | 2008-03-05 14:23:26 +0900 | [diff] [blame] | 43 | #elif defined (CONFIG_CPU_SH7780) |
| Nobuhiro Iwamatsu | 53b3143 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 44 | # include <asm/cpu_sh7780.h> |
| Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 45 | #else |
| Nobuhiro Iwamatsu | 53b3143 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 46 | # error "Unknown SH4 variant" |
| Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 47 | #endif |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 48 | |
| Yoshihiro Shimoda | e55bb63 | 2009-03-03 15:11:08 +0900 | [diff] [blame] | 49 | #if defined(CONFIG_SH_32BIT) |
| 50 | #define PMB_ADDR_ARRAY 0xf6100000 |
| 51 | #define PMB_ADDR_ENTRY 8 |
| 52 | #define PMB_VPN 24 |
| 53 | |
| 54 | #define PMB_DATA_ARRAY 0xf7100000 |
| 55 | #define PMB_DATA_ENTRY 8 |
| 56 | #define PMB_PPN 24 |
| 57 | #define PMB_UB 9 /* Buffered write */ |
| 58 | #define PMB_V 8 /* Valid */ |
| 59 | #define PMB_SZ1 7 /* Page size (upper bit) */ |
| 60 | #define PMB_SZ0 4 /* Page size (lower bit) */ |
| 61 | #define PMB_C 3 /* Cacheability */ |
| 62 | #define PMB_WT 0 /* Write-through */ |
| 63 | |
| 64 | #define PMB_ADDR_BASE(entry) (PMB_ADDR_ARRAY + (entry << PMB_ADDR_ENTRY)) |
| 65 | #define PMB_DATA_BASE(entry) (PMB_DATA_ARRAY + (entry << PMB_DATA_ENTRY)) |
| 66 | #define mk_pmb_addr_val(vpn) ((vpn << PMB_VPN)) |
| 67 | #define mk_pmb_data_val(ppn, ub, v, sz1, sz0, c, wt) \ |
| 68 | ((ppn << PMB_PPN) | (ub << PMB_UB) | \ |
| 69 | (v << PMB_V) | (sz1 << PMB_SZ1) | \ |
| 70 | (sz0 << PMB_SZ0) | (c << PMB_C) | \ |
| 71 | (wt << PMB_WT)) |
| 72 | #endif |
| 73 | |
| Nobuhiro Iwamatsu | 547b67f | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 74 | #endif /* _ASM_CPU_SH4_H_ */ |