Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 6980b6b | 2019-11-14 12:57:45 -0700 | [diff] [blame] | 7 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 8 | #include <asm/global_data.h> |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 9 | #include <asm/post.h> |
| 10 | #include <asm/arch/qemu.h> |
Simon Glass | de1669f | 2023-07-30 21:02:04 -0600 | [diff] [blame] | 11 | #include <linux/sizes.h> |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 12 | |
| 13 | DECLARE_GLOBAL_DATA_PTR; |
| 14 | |
Bin Meng | 38502eb | 2019-08-29 02:53:04 -0700 | [diff] [blame] | 15 | u32 qemu_get_low_memory_size(void) |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 16 | { |
| 17 | u32 ram; |
| 18 | |
| 19 | outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT); |
| 20 | ram = ((u32)inb(CMOS_DATA_PORT)) << 14; |
| 21 | outb(LOW_RAM_ADDR, CMOS_ADDR_PORT); |
| 22 | ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; |
| 23 | ram += 16 * 1024; |
| 24 | |
Bin Meng | 38502eb | 2019-08-29 02:53:04 -0700 | [diff] [blame] | 25 | return ram * 1024; |
| 26 | } |
| 27 | |
Bin Meng | fc7f57f | 2019-08-29 02:53:05 -0700 | [diff] [blame] | 28 | u64 qemu_get_high_memory_size(void) |
| 29 | { |
| 30 | u64 ram; |
| 31 | |
| 32 | outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT); |
| 33 | ram = ((u64)inb(CMOS_DATA_PORT)) << 22; |
| 34 | outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT); |
| 35 | ram |= ((u64)inb(CMOS_DATA_PORT)) << 14; |
| 36 | outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT); |
| 37 | ram |= ((u64)inb(CMOS_DATA_PORT)) << 6; |
| 38 | |
| 39 | return ram * 1024; |
| 40 | } |
| 41 | |
Bin Meng | 38502eb | 2019-08-29 02:53:04 -0700 | [diff] [blame] | 42 | int dram_init(void) |
| 43 | { |
| 44 | gd->ram_size = qemu_get_low_memory_size(); |
Bin Meng | fc7f57f | 2019-08-29 02:53:05 -0700 | [diff] [blame] | 45 | gd->ram_size += qemu_get_high_memory_size(); |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 46 | post_code(POST_DRAM); |
| 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 51 | int dram_init_banksize(void) |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 52 | { |
Bin Meng | fc7f57f | 2019-08-29 02:53:05 -0700 | [diff] [blame] | 53 | u64 high_mem_size; |
| 54 | |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 55 | gd->bd->bi_dram[0].start = 0; |
Bin Meng | fc7f57f | 2019-08-29 02:53:05 -0700 | [diff] [blame] | 56 | gd->bd->bi_dram[0].size = qemu_get_low_memory_size(); |
| 57 | |
| 58 | high_mem_size = qemu_get_high_memory_size(); |
| 59 | if (high_mem_size) { |
| 60 | gd->bd->bi_dram[1].start = SZ_4G; |
| 61 | gd->bd->bi_dram[1].size = high_mem_size; |
| 62 | } |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 63 | |
| 64 | return 0; |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | /* |
| 68 | * This function looks for the highest region of memory lower than 4GB which |
| 69 | * has enough space for U-Boot where U-Boot is aligned on a page boundary. |
| 70 | * It overrides the default implementation found elsewhere which simply |
| 71 | * picks the end of ram, wherever that may be. The location of the stack, |
| 72 | * the relocation address, and how far U-Boot is moved by relocation are |
| 73 | * set in the global data structure. |
| 74 | */ |
Heinrich Schuchardt | 51a9aac | 2023-08-12 20:16:58 +0200 | [diff] [blame^] | 75 | phys_addr_t board_get_usable_ram_top(phys_size_t total_size) |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 76 | { |
Bin Meng | fc7f57f | 2019-08-29 02:53:05 -0700 | [diff] [blame] | 77 | return qemu_get_low_memory_size(); |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 78 | } |